MIC68200 Datasheet, PDF (12/15 Pages) Micrel Semiconductor – 2A Sequencing LDO with Tracking and Ramp Control

Micrel, Inc.
Ramp Up: Cap Controlled Slew Rate
If a capacitor is connected to RC, the bidirectional
current source will charge the cap during startup and
discharge the cap during shutdown. The size of the
capacitor and the RC current (1µA nom) control the
slew rate of the output voltage during startup. For
example, to ramp up a 1.8V regulator from zero to full
output in 10mSec requires a 5.6nF capacitor.
For Fixed Versions:
T_RC
=
V_OUT
⎜⎜⎝⎛
C_RC
1µ A
⎟⎟⎠⎞
SR _ON
=
⎜⎜⎝⎛
1µ A
C_RC
⎟⎟⎠⎞
Similarly, to slew an adjustable (any output voltage)
from 0 to full output in 10mSec requires a 20nF cap.
For Adjustable Versions:
T_RC
=
0.5V_{⎜⎜⎝⎛}
C_RC
1µ A
⎟⎟⎠⎞
SR _ON
=
2V_OUT
⎜⎜⎝⎛
1µ A
C_RC
⎟⎟⎠⎞
Ramp Down: Turn Off Slew Rate
When EN is lowered and the DLY pin has discharged,
the RC pin and the OUT pin slew toward zero. For
fixed voltage devices, the RC pin slew rate is 2 to 3
times the SR_ON defined above. For adjustable voltage
devices the RC pin slew is much higher. In both
cases, turn off slew rate may be determined by the
RC pin for low values of output capacitor, or by the
maximum discharge current available at the output for
large values of output capacitor. Turn off slew rate is
not a specified characteristic of the MIC68200.
Sequencing Configurations
Sequencing refers to timing based Master/Slave
control between regulators. It allows a Master device
to control the start and stop timing of a single or
multiple Slave devices. In typical sequencing the
Master POR drives the Slave EN. The sequence
begins with the Master EN driven high. The Master
output ramps up and triggers the Master DLY when
the Master output reaches 90%. The Master DLY then
determines when the POR is released to enable the
Slave device. When the Master EN is driven low, the
Master POR is immediately pulled low causing the
Slave to ramp down. However, the Master output will
not ramp down until the Master DLY has fully
discharged. In this way, the Master power can remain
good after the Slave has been ramped down.
In sequencing configurations the Master DLY controls
the turn-on time of the Slave and the Slave DLY
controls the turn-off time of the Slave.
MIC68200
Sequencing Connections
VIN = 2.5V
EN
10K
MIC68200-1.8YML
IN
U1 ^OUT
RC _Master POR
EN GND DLY
MIC68200-1.2YML
IN _U2 OUT
RC _Slave POR
EN GND DLY
4.7µF
CDlyM
4.7µF
I/O
µProcessor
Core
CDlyS
/RESET
10K
Delayed Sequencing
CDlyS > CDlyM [CDlyS=2nF; CDlyM=1nF]
Windowed Sequencing
CDlyS < CDlyM [CDlyS=1nF; CDlyM=2nF]
July 2006
12
M9999-071206
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