English
Language : 

MIC2871 Datasheet, PDF (12/24 Pages) Micrel Semiconductor – 1.2A High-Brightness LED Flash Driver with Single-Wire Serial Interface
Micrel, Inc.
Single-Wire Interface
The single-wire interface allows the use of a single
multiplexed enable and data pin (DC) for control and
communication in GPIO limited applications. The
interface is implemented using a simple mechanism
allowing any open drain or directly driven GPIO to control
the MIC2871.
The MIC2871 uses the single-wire interface for simple
command and control functions. The interface provides
fast access to write only registers with protection features
to avoid potentially erroneous data writes and improve
robustness. When DC is in a low state and no data is
detected for an extended period of time, the MIC2871 will
automatically go into a low-power SHUTDOWN state,
simultaneously resetting internal registers to default
states.
Overview
The single-wire interface relies on a combination of bit
edges and the period between edges in order to
communicate across a single wire. Each word is
transmitted as a series of pulses, with each pulse
incrementing an internal data counter. A stop sequence
consisting of an inactive period is used to latch the data
word internally. An address and data framing format is
used to improve protection against erroneous writes by
enforcing address and data field lengths as well as the
timing duration between them.
Timing is designed such that when communicating with a
device using a low cost on chip oscillator, the worst case
minimum and maximum conditions can be easily met
within the wide operating range of the oscillator. Using
this method guarantees that the device can always detect
the delay introduced by the communication master.
Idle States and Error Conditions
In shutdown mode, the MIC2871 is in a reset condition
with all functions off while consuming minimal power.
Register settings are reset to default state when coming
out of shutdown state. In idle mode, all register settings
persist and all MIC2871 functions continue in their current
state. Table 1 summarises the difference between the
two idle modes:
Table 1. Differences between Idle Modes
Shutdown
DC
Low
ISUPPLY
(all functions off)
1μA
Register State
Default
Start-Up Time
1μs
Idle
High
230μA
Persist
100ns
MIC2871
Idle mode is entered automatically at the end of a
communication frame by holding DC high for ≥TEND, by
enabling the device by bringing DC high when in
shutdown mode, or when an error is detected by the
single-wire interface logic.
Shutdown mode can be entered at any time by pulling
down DC for ≥TEND, discarding any current
communication and resetting the internal registers. If a
communication is received before the shutdown period
but after the TLAT period, the communication is discarded.
This state is also used to create an internal error state to
avoid erroneously latching data where the communication
process cannot be serviced in time. Additionally, each
register has a maximum value associated with it. If the
number of bits clocked in exceeds the maximum value for
the register, the data is assumed to be in error and the
data is discarded.
Figure 2. Abort, Shutdown, and Idle Timing Waveforms
Communication Details
The serial interface requires delimiters to indicate the
start of frame, data as a series of pulses, and end of
frame indicated by a lack of activity. The start of frame is
the first high to low transition of DC when in idle mode.
The first rising edge resets the internal data counter to 0.
May 29, 2013
12
052913-1.0 (while in progress)
Revision 1.0 (final document)