MIC5164 Datasheet, PDF (11/23 Pages) Micrel Semiconductor – Dual Regulator Controller for DDR3 GDDR3/4/5 Memory and High-Speed Bus Termination

Micrel, Inc.
Power dissipation in an SSTL circuit will be identical for
both the high-side and low-side MOSFETs. Since the
supply voltage is divided by half to supply V_TT, both
MOSFETs have the same voltage dropped across them.
They are also required to be able to sink and source the
same amount of current (for either all 0’s or all 1’s). This
equates to each side being able to dissipate the same
amount of power. Power dissipation calculation for the
high-side driver is as follows:
P_D = (V_DDQ − V_TT) × I_SOURCE
where I_SOURCE is the average source current. Power
dissipation for the low-side MOSFET is as follows:
P_D = V_TT × I_SINK
where I_SINK is the average sink current.
In a typical 3A peak SSTL_2 circuit, power
considerations for MOSFET selection would occur as
follows:
P_D = (V_DDQ −V_TT) × I_SOURCE
P_D = (2.5V −1.25V) × 1.6A
P_D = 2W
This typical SSTL_2 application would require the high-
side and low-side N-Channel MOSFETs to be able to
handle 2 Watts each. In higher current applications,
multiple N-Channel MOSFETs may be placed in parallel
to spread the power dissipation. These MOSFETs will
share current, distributing power dissipation across each
device.
The maximum MOSFET die (junction) temperature limits
maximum power dissipation. The ability of the device to
dissipate heat away from the junction is specified by the
junction-to-ambient (θ_JA) thermal resistance.
This is the sum of junction-to-case (θ_JC) thermal
resistance, case-to-sink (θ_CS) thermal resistance and
sink-to-ambient (θ_SA) thermal resistance:
θ_JA = θ_JC + θ_CS + θ_SA
MIC5164
In our example of a 3A peak SSTL_2 termination circuit,
we have selected a D-pack N-Channel MOSFET that
has a maximum junction temperature of 125°C. The
device has a junction-to-case thermal resistance of
1.5°C/Watt. Our application has a maximum ambient
temperature of 60°C. The required junction-to-ambient
thermal resistance can be calculated as follows:
θ _JA
= ^{TJ − TA}
P_D
Where T_J is the maximum junction temperature, T_A is the
maximum ambient temperature and P_D is the power
dissipation.
In our example:
θ _JA
= ^{TJ − TA}
P_D
125°C - 60°C
θ_JA =
2W
θ_JA = 32.5°C / W
This shows that our total thermal resistance must be
better than 32.5°C/W. Since the total thermal resistance
is a combination of all the individual thermal resistances,
the amount of heat sink required can be calculated as
follows:
θ_SA = θ_JA − (θ_JC + θ_CS)
In our example:
θ_SA = 32.5°C / W - (1.5°C / W + 0.5°C / W )
θ _SA = 30 .5 °C / W
In most cases, case-to-sink thermal resistance can be
assumed to be about 0.5°C/W.
The SSTL termination circuit for our example, using two
D-pack N-Channel MOSFETs (one high-side and one
low-side) will require enough copper area to spread the
heat from the MOSFET. In this example to dissipate 2W
from TO-252 package a 2 oz copper of 1.0 in² on
component side is required. In some cases, airflow may
also help to reduce thermal resistance. For different
MOSFET package refer to manufacturer Data Sheet for
copper area requirements.
June 2010
11
M9999-061510