MIC2358YLQ Datasheet, PDF (11/29 Pages) Micrel Semiconductor – IEEE 802.3af Octal Power Sourcing Equipment Controller

Micrel, Inc.
MIC2358YLQ
Functional Description
The MIC2358YLQ operations are fully compliant with
the IEEE 802.3af-2005 standard. States referenced in
this section are per IEEE PSE State Diagram. See DC
and AC Electrical Characteristics sections for timers,
voltage threshold, and current threshold values.
Autonomous Operation
The autonomous mode allows for applications that have
no central host controller, or have limited supervision of
the MIC2358YLQ.
With the ENABLE_L pin low during power-up, the
MIC2358YLQ will initialize and immediately begin
checking ports for valid detection signatures, and if
present, perform classification and apply power.
Managed Operation
In Managed mode, the MIC2358YLQ may be configured
and monitored by an external host processor.
Operations include: PD detection, classification,
diagnostics, power budget, power-on, power-off, check
status, detect faults, AC/DC disconnect detection,
voltage and current measurement per port basis.
With the ENABLE_L pin high during device power-up,
the MIC2358YLQ will initialize, but will not begin to
perform detection on any port until instructed from an
external host controller via SMBus.
Reset
At power-up or anytime the MIC2358YLQ supports both
hard and soft reset. Upon reset, all ports immediately
shut off and internal registers default to values as shown
in Register Description section.
Upon a reset operation, the MIC2358YLQ will be
configured based on the strap-in pins: ENABLE,
DCMPS, ACMPS, ICO, and ALTB (see Pin Description
for configuration details). These register bits may be
programmed by the host. Any changes to these pins
after reset are ignored.
Power Delivery Control
The primary function of the MIC2358YLQ is to control
power delivery to each PSE port. It does this by
controlling the gate drive voltage of an external N-
Channel power FET while monitoring the current
through a sense resistor (RS, PnSENSE) and the output
voltage across the positive (PnOUTPOS) and negative
(PnOUTNEG) terminal pins, where n is the port number
(1-8). At power-up, the isolated 48V input supply is
coupled to the port in an inrush-controlled manner.
Power will then be delivered to the connected PD based
upon its classification sensed at power-up. The gate
drive logic is designed to prevent simultaneous power-
up of ports.
The sense resistor value was selected to reduce power
loss and the voltage. The 1Ω resistor is connected
between source and the MIC2358YLQ Sense-ARTN
pins.
By measuring this voltage across the sense resistor, the
MIC2358YLQ sense terminal pin specifically monitors
current flow during port classification, power-up inrush,
power-on short, power-on overload, and DC disconnect
detect. It also measures PD load current on demand by
the host.
PD Detection
The MIC2358YLQ will not deliver power until a valid PD
is detected. A valid PD has a 25kΩ discovery signature
as specified in the IEEE 802.3af standard. The detection
cycle is repeated continuously until a valid PD is
detected. The status of PD discovery signature for each
port is available to the host.
During PD detection, the MIC2358YLQ uses an internal
FET to force probe voltages VDETECT1 and
VDETECT2 across the port’s power terminals
(PnOUTPOS, PnOUTNEG). The resulting currents to
the port are determined by measuring the voltage
across an external 1kΩ resistor that must be connected
to the RDET pin. A two-point V-I slope measurement is
used as specified by the IEEE 802.3af standard to verify
that a valid signature resistance is connected to the port.
The IEEE802.3af standard requires mid-span PSE
(Alternative B) to support backoff timing. This causes
the port to wait a time period specified by tDBO before
attempting another detection cycle after every failed PD
detection. With the ALTB pin high during reset or
enabled by the host, the MIC2358YLQ ports are
initialized as Alternative B.
PD Classification
PD Classification enables each PD to request the power
level from the PSE. Per IEEE802.3af standard,
classification is preceded by successful detection cycle
and is optional. PD Classifications status for each port is
available to the host upon completion of the PD
Classification process.
During classification, the MIC2358YLQ turns on the
external FET and forces probe voltage VCLASS across
the positive and negative terminals of the port. The
resulting current is measured across RS. The measured
current determines the class of the PD as shown in
Table 1.
Successful PD Classification does not necessarily
guarantee that the PSE will be able to deliver power to
the PD at a particular port. The MIC2358YLQ enables
the power budget to be managed by the host (Managed
Mode) or the unique Shared Power Management
(Autonomous Mode). The MIC2358YLQ allows the host
July 2010
11
M9999-070810