MIC58P01 Datasheet, PDF (1/5 Pages) Micrel Semiconductor – 8-Bit Parallel-Input Protected Latched Driver

MIC58P01
Micrel
MIC58P01
8-Bit Parallel-Input Protected Latched Driver
General Description
Features
The MIC58P01 parallel-input latched driver is a high-voltage
(80V), high-current (500mA) integrated circuit comprised of
eight CMOS data latches, a bipolar Darlington transistor
driver for each latch, and CMOS control circuitry for the
common CLEAR, STROBE, and OUTPUT ENABLE functions.
Similar to the MIC5801, additional protection circuitry supplied
on this device includes thermal shutdown, under voltage
lockout (UVLO), and overcurrent shutdown.
The bipolar/CMOS combination provides an extremely low-
power latch with maximum interface flexibility. The MIC58P01
has open-collector outputs capable of sinking 500 mA and
integral diodes for inductive load transient suppression with a
minimum output breakdown voltage rating of 80V (50V
sustaining). The drivers may be paralleled for higher load
current capability.
• 4.4MHz Minimum Data Input Rate
• High-Voltage, High-Current Outputs
• Per-Output Overcurrent Shutdown (500mA typical)
• Under Voltage Lockout
• Thermal Shutdown
• Output Transient Protection Diodes
• CMOS, PMOS, NMOS, and TTL Compatible Inputs
• Internal Pull-Down Resistors
• Low-Power CMOS Latches
With a 5V logic supply, the MIC58P01 will typically operate at _{Ordering Information}
better than 5MHz. With a 12V logic supply, significantly higher
speeds are obtained. The CMOS inputs are compatible with ^{Part Number Temperature Range}
Package
standard CMOS, PMOS, and NMOS circuits. TTL circuits
may require pull-up resistors.
MIC58P01BN
–40°C to +85°C
22-Pin Plastic DIP
Each of these eight outputs has an independent overcurrent
shutdown of 500mA. Upon current shutdown, the affected
MIC58P01BV
MIC58P01BWM
–40°C to +85°C
–40°C to +85°C
28-Pin PLCC
24-Pin Wide SOIC
channel will turn OFF until V is cycled or the ENABLE/
DD
RESET pin is pulsed high. Current pulses less than 2µs will
not activate current shutdown. Temperatures above 165°C
7
will shut down all outputs. The UVLO circuit disables the
outputs at low V_DD; hysteresis of 0.5V is provided.
Functional Diagram
STROBE
VDD
CLEAR
ENABLE/RESET
2.2R
1.25V
R
+
–
UVLO
THERMAL
SHUTDOWN
ISHUTDOWN
IREF
IOUT / N
SQ
R
COMMON
OUTPUT
IN
R1
70k
Circuitry below dashed line is
included in each of the 8 channels.
R2
3k
VEE
Pin Configuration
(DIP)
CLEAR 1
STROBE 2
IN1 3
IN2 4
IN3 5
IN4 6
IN5 7
IN6 8
IN7 9
IN8 10
GROUND ¹¹
22 ^OUTPUT
I_LIMIT AND
ENABLE/RESET
THERMAL
SHUTDOWN
21
VDD
20 _OUT1
19 _OUT2
18 _OUT3
17 OUT4
16 OUT5
15 OUT6
14 OUT7
13 ^OUT8
UVLO
12 COMMON
October 1998
7-17