KSZ8893MBL Datasheet, PDF (1/116 Pages) Micrel Semiconductor – Integrated 3-Port 10/100 Managed Switch with PHYs

KSZ8893MQL/MBL
Integrated 3-Port 10/100 Managed
Switch with PHYs
Rev. 1.6
General Description
The KSZ8893MQL/MBL, a highly integrated layer 2
managed switch, is designed for low port count,
cost-sensitive 10/100 Mbps switch systems. It offers
an extensive feature set that includes rate limiting,
tag/port-based VLAN, QoS priority, management,
management information base (MIB) counters,
RMII/MII/SNI, and CPU control/data interfaces to
effectively address both current and emerging Fast
Ethernet applications.
The KSZ8893MQL/MBL contains two 10/100
transceivers
with patented mixed-signal low-power technology,
three media access control (MAC) units, a high-
speed non-blocking switch fabric, a dedicated
address lookup engine, and an on-chip frame buffer
memory.
Both PHY units support 10BASE-T and 100BASE-
TX. In addition, one PHY unit supports 100BASE-FX.
The KSZ8893MQL/MBL comes in a lead-free
package, and is also available in industrial
temperature-grade KS8893MQLI/MBLI and
Automotive-grade KSZ8893 MQL AM. (See Ordering
Information).
___________________________________________________________________________________________________
Functional Diagram
HP AUTO
MDIX
HP AUTO
MDIX
RMII/MII/
SNI
10/100
T/TX/FX
PHY 1
10/100
T/TX
PHY 2
10/100
MAC 1
10/100
MAC 2
10/100
MAC 3
SNI
1K LOOK-UP
ENGINE
QUEUE
MANAGEMENT
BUFFER
MANAGEMENT
FRAME
BUFFERS
SPI
SPI
MIB
COUNTERS
MIIM
SMI
I2C
P1 LED[3:0]
P2 LED[3:0]
LED
DRIVERS
CONTROL
REGISTERS
EEPROM
INTERFACE
STRAP IN
CONFIGURATION
LinkMD is a registered trademark of Micrel, Inc.
Product names used in this datasheet are for identification purposes only and may be trademarks of their respective companies.
February 2010
1
M9999-021110-1.6