MLX81205_15 Datasheet, PDF (8/18 Pages) Melexis Microelectronic Systems – BLDC Motor Controller

MLX81205/07
Parameter
DC voltage on drivers supply pin VREF
DC voltage on pin CLKO
DC voltage on drivers control pins
LS<2:0>
DC voltage on drivers pins
CP<2:0>
DC voltage on drivers pins HS<2:0>
DC voltage on phases related pins
U,V,W
DC voltage on phases related pin T
Positive dynamic disturbance on pin
VBAT_S1 11
ESD capability of pin LIN to GND
Symbol
Condition
Voltage on pins CP<2:0>
must not exceed 45V.
Voltage on pins HS<2:0>
must not exceed 45V
Voltage on pins U,V,W must
not exceed 36V
Voltage on pin T must not
exceed 36V
Vpdd
Spdd > 2 V/µs
ESDBUSHB Human body model 12
min
max Unit
-0.3
18
V
-0.3 VREF+0.3 V
-0.5 8 VREF+0.3 V
-0.3
V<U,V,W>
+ 13
V
-0.5 9
10
VS +
VREF
V
-0.5
9 10
VS+1.5
V
-0.3 VS+1.5
V
4.5
V
-6
+6
kV
ESD capability of pin VS to GND
ESDVSHB Human body model 12
-4
+4
kV
ESD capability of any other pins
ESD capability ay any pin
Maximum latch–up free current at any pin
Junction temperature 2
Storage temperature
Rthjc QFN32 14
Rthjc QFN48 14
Rthjc TQFP48 14
ESDHB
ESDCDM
ILATCH
Tvj
Tstg
Rthjc
Human body model 12
Charge Device Model 13
Table 5 – Absolute Maximum Ratings
-2
+2
kV
-500
+500
V
-250
+250
mA
+155
°C
-55
+150
°C
10
5
5.5
8 During short transient pulses smaller than 1us and while the LS driver is fully connecting the LS pin to GND (i.e. LSI_N_DRV[3:0]=0xF),
the voltage on any LS<2:0> pin is allowed: -1V ≤ LS<2:0> ≤ -0.5: if the current flowing out of any LS<2:0> pin does not exceed 75mA.
The sum of all currents flowing out of the LS pins during these conditions must not exceed 150mA
9 During short transient pulses smaller than 1us, the voltage on any HS<2:0> pin and any U,V or W pin is allowed: -1V ≤ HS<2:0>, U,V,W
≤ -0.5: if the current flowing out of any pin HS<2:0>, U,V,W does not exceed 50mA
10 During short transient pulses smaller than 1us, the sum of all currents flowing out of pins HS<2:0> and U,V,W with -1V < HS<2:0>,
U,V,W <-0.5 must not exceed 75mA
11 There might be ripple on the VBAT_S1 pin due to parasitic elements in the supply line. Positive voltage peaks with a slew rate larger
than Spdd should be limited to Vpdd (see Datasheet). This only applies if the high side current sensor is switched on
12 Equivalent to discharging a 100pF capacitor through a 1.5kΩ resistor conform to AEC-Q100-002 or ESDA/JEDEC JDS-001
13 ESD CDM Test confirm to AEC-Q100-011 or JEDEC22-C101
14 Simulated value for low conductance board (JEDEC)
390108120502
Rev. 4.7
Page 8 of 18
Product Abstract
11/2/2015