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MLX81205_15 Datasheet, PDF (7/18 Pages) Melexis Microelectronic Systems – BLDC Motor Controller
MLX81205/07
4. Electrical Characteristics
All voltages are referenced to ground (GND). Positive currents flow into the IC. The absolute maximum ratings given in
table below are limiting values that do not lead to a permanent damage of the device but exceeding any of these limits
may do so. Long term exposure to limiting values may affect the reliability of the device. Reliable operation of the
MLX81205/07 is only specified within the limits shown in Table 4.
4.1 Operating Conditions
Parameter
IC supply voltage
Operating ambient temperature
Symbol
min
VS
5.0
Tamb
-40
Table 4 – Operating Conditions
4.2 Absolute Maximum Ratings
max
18
+125 (+150) 2
Unit
V
°C
Parameter
Symbol
VS
IC supply voltage on pins VS, VBAT_S1,
VBAT_S2
VS.tr1
VS.tr2
VS.tr3
LIN Bus
VS.tr5
VLIN
VLIN.tr1
VLIN.tr2
Maximum reverse current into any pin 7
Maximum sum of reverse currents into all
pins 7
DC voltage on LVIO pins,
OSC<2:1>
DC voltage on pins HV I/O
VLIN.tr3
Condition
T = 2 min
T < 500 ms 3
ISO 7637-2 pulse 1 4
VS=13.5V, TA=(23 ± 5)°C
ISO 7637-2 pulse 2 4
VS=13.5V, TA=(23 ± 5)°C
ISO 7637-2 pulses 3A, 3B 4
VS=13.5V, TA=(23 ± 5)°C
ISO 7637-2 pulses 5b 4
VS=13.5V, TA=(23 ± 5)°C
T<500ms
ISO 7637-2 pulse 1 5
VS=13.5V, TA=(23 ± 5)°C
ISO 7637-2 pulse 2 5
VS=13.5V, TA=(23 ± 5)°C
ISO 7637-2 pulses 3A, 3B 6
VS=13.5V, TA=(23 ± 5)°C
min
-0.3
-100
max Unit
28
V
45
V
+75
V
-150
+100
V
+65
+87
V
-25
40
V
-100
+75
-150
+100
-10
+10
mA
+10
mA
-0.3 VDDA+0.3 V
-0.3 VS+0.3
V
2 With temperature applications at TA>125°C a reduction of chip internal power dissipation by using an external supply transistor is
mandatory. The extended temperature range is only allowed for a limited period of time, a mission profile has to be agreed by Melexis
as a mandatory part of the Part Submission Warrant (PSW)
3 Only allowed, if FET drivers are disabled, i.e. the high-side driver must not be stressed with V(CP) > 45V
4 ISO 7637 test pulses are applied to VS via a reverse polarity diode and >22μF blocking capacitor
5 ISO 7637 test pulses are applied to LIN via a coupling capacitance of 1nF
6 ISO 7637 test pulses are applied to LIN via a coupling capacitance of 100pF
7 Excluding pins HS0, HS1, HS2, U, V, W, LS0, LS1, LS2.
390108120502
Rev. 4.7
Page 7 of 18
Product Abstract
11/2/2015