MLX71120_12 Datasheet, PDF (8/31 Pages) Melexis Microelectronic Systems – FSK/FM/ASK Receiver

MLX71120
300 to 930MHz
FSK/FM/ASK Receiver
1.6 Mixer Section
The mixer section consists of two mixers. Both are double-balanced mixers. The second mixer is built as an
image rejection mixer. The first mixer’s inputs (MIXP and MIXN) are functionally the same. For single-ended
drive, the unused input has to be tied to ground via a capacitor. A soft band-pass filter is placed between the
mixers.
RFSEL
0
1
Description
Input frequency range 300 to 470MHz
Input frequency range 610 to 930MHz
Pin RFSEL is used to select the required RF band. The LO frequencies and the proper sidebands for image
suppression will be set accordingly. The mixer output (MIXO) is to drive an external IF filter. This output is set
up by a source follower that can be biased to create a driving impedance of either 1500 Ohms or 330 Ohms,
depending on the logic level at pin IFSEL.
IFSEL
0
1
Description
IF2 = 455 kHz
IF2 = 10.7 MHz
This feature allows to use standard ceramic filters for 455kHz and 10.7MHz. They can be connected directly
without additional matching elements. The overall voltage conversion gain of the mixer section is approxi-
mately 25dB.
1.7 IF Amplifier
After having passed the IF filter, the signal is amplified by a high-gain limiting amplifier. It consists of several
AC-coupled gain stages with a bandwidth of 400kHz to 11MHz. The overall small-signal pass-band gain is
about 80dB. A received-signal-strength indicator (RSSI) signal is generated within the IF amplifier and is
available at pin RSSI.
1.8 PLL Synthesizer
The PLL synthesizer consists of a fully integrated voltage-controlled oscillator running at 400MHz to
640MHz, a distributed feedback divider chain, an edge-triggered phase-frequency detector, a charge pump,
a loop filter and a crystal-based reference oscillator. The PLL is used for generating the LO signals. The LO1
is directly taken from the VCO output, and the LO2 is derived from the LO1 signal passing the N1 counter.
Another counter N2 follows N1. The overall feedback divider ratio N_tot is fixed to 24. The values of N1 and N2
are depending on the selected RF band that can be chosen via pin RFSEL.
RFSEL
f_LO1min
[MHz]
f_LO1max
[MHz]
f_LO2min
[MHz]
f_LO2max
[MHz]
N₁
0
400
640
100
160
4
1
400
640
200
320
2
N₂
N_tot
6
24
12
24
39010 71120
Rev. 008
Page 8 of 31
Data Sheet
Jun/12