MLX80001 Datasheet, PDF (6/28 Pages) Melexis Microelectronic Systems – 4-channel Master LIN Transceiver

MLX80001
4-channel Master LIN Transceiver
2.2 Absolute Maximum Ratings
Parameter
Battery Supply Voltage
Transients at battery supply voltage
Transients at battery supply voltage
Transients at high voltage signal pins
Transients at high voltage signal pins
Transients at high voltage signal and power supply
pins
DC voltage LIN
DC voltage logic I/O’s
ESD capability any pins
ESD capability LINx
Maximum latch – up free current at any Pin
Maximum power dissipation ^[4]
Thermal impedance
Storage temperature
Junction temperature
Symbol Condition
Min
VS
VVS.tr1
VVS.tr2
VLINx..tr1
VLINx..tr2
t < 1 min
-0.3
ISO 7637/2 pulse 5, t < 400ms
ISO 7637/2 pulse 1^[1]
-100
ISO 7637/3 pulse 2^[1]
ISO 7637/3 pulses 1^[2]
-30
ISO 7637/3 pulses 2^[2]
VHV..tr3 ISO 7637/2 pulses 3A, 3B ^[3]
-200
VLIN_DC
t < 500ms , Vs = 18V
Vs = 0V
-22
-40
Vlogic_DC
-0.3
Human body model,
VESDHB equivalent to discharge
-2
100pF with 1.5kΩ,
Human body model,
VESDHB_HV equivalent to discharge
-4
100pF with 1.5kΩ,
ILATCH
-500
Tamb = +125 °C
Ptot
Tamb = +105 °C
Tamb = + 95 °C
ΘJA in free air
Tstg
-55
Tvj
-40
Max Unit
30
V
45
V
+50
V
V
+30
V
+200 V
+40
V
+7
V
+2
kV
+4
kV
+500 mA
0.75
1.3
W
1.6
34 K/W
+150 °C
+150 °C
[1] ISO 7637/2 test pulses are applied to VS via a reverse polarity diode and >10uF blocking capacitor.
[2] ISO 7637/3 test pulses are applied to LIN via a coupling capacitance of 100nF.
[3] ISO 7637/3 test pulses are applied to LIN via a coupling capacitance of 1nF. ISO 7637/2 test pulses are applied to VS via a
reverse polarity diode and >10uF blocking capacitor
[4] Simulated values for low conductance board (JEDEC)
MLX80001 – Datasheet
3901080001
Page 6 of 28
March 2007
Rev 001