MLX75031 Datasheet, PDF (41/67 Pages) Melexis Microelectronic Systems – Optical Gesture & Proximity Sensing IC

MLX75031
Optical Gesture & Proximity Sensing IC
with Integrated LED Drivers
Datasheet
To go into standby mode, the same procedure shall be applied: uploading a RSTBY command makes the
request standby flag going high. Uploading a CSTBY will make the device going into standby mode, whereby
the request standby flag will be cleared and the power state bits will be set accordingly.
Bit 2: Device in TestMode/Normal Mode
To make the sensor efficiently testable in production, several test modes are foreseen to get easy access to
different blocks. The status flag bit 2 indicates if the device is operating in Test Mode or Normal Mode.
If the device enters test mode by accident, the application will still work like normal. However, the status
flag bit 2 will be set high. The master can take actions to get out of test mode by uploading a CR command.
Bit 1: Internal Oscillator is enabled/disabled
This bit is high when the internal oscillator is enabled. Once the RCO is shut down the bit will be set low.
Bit 0: Critical Error is detected/not detected
During each measurement cycle there is a monitoring of the voltage on critical nodes along the analog
paths. When the voltage of one of these controlled nodes goes out of its normal operating range, the
Critical Error Flag will be set high.
Following nodes are monitored :
- TIA output: when the output is clipped (either high or low), the Critical Error Flag will be set high
- Difference between DAC output and shunt-feedback
- An internal reference voltage
- Output of the common mode SC-amplifiers of the Ambient Light/Temperature Channels
- Frequency on RCO output
- Voltage on the VSUP pin
In case the Critical Error Flag was set high, the 'Err' register indicates which node voltages got out of their
normal operating range. More info about the 'Err' register can be found in Section 8.13.6.
The Critical Error Flag remains high as long as the 'Err' register is not cleared. Once the 'Err' register is
cleared, the Critical Error Flag will be cleared as well.
Note : after POR, or after wake-up from Sleep/Standby, some bits in the 'Err' register might be set.
As such the Critical Error Flag might be set as well.
REVISION 001 – JANUARY, 2013
39010xxxxx
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