EVB71122_15 Datasheet, PDF (18/31 Pages) Melexis Microelectronic Systems – 300 to 930MHz Receiver Evaluation Board Description

EVB71122
300 to 930MHz Receiver
Evaluation Board Description
3.1.3 Control Word R2
Name
A
N
Bits
[4:0]
[11:5]
Description
swallow counter value
10100
value is 20
swallow counter range: 0 to 31
program counter value (bits 0 – 6)
000 0111 1000 N value is 120
N counter range: 3 to 2047
#default
#default
3.1.4 Control Word R3
N
LO2DIV
AGCEN
AGCDEL
MFO
[3:0]
[4]
[5]
[7:6]
[11:8]
program counter range (bits 7 – 10)
000 0111 1000 N value is 120
#default
N counter range: 3 to 2047
LO2 divider ratio
0 divide by 4
1 divide by 8
#default
AGC enable mode
0 disabled
1 enabled
#default
AGC delay settings
00 no delay
01 3/f_IFF
10 15/f_IFF
11 31/f_IFF
#default
fIFF is the reference oscillator frequency fRO divided by RIFF, see section 3.1.6 (R6)
multi functional output
0000
0001
0010
0011
0100
0101
1000
MFO is in Z state
MFO is SPI read-out
MFO = 0
MFO = 1
MFO is analog RO output
MFO is IFF output
MFO is lock detector output
#default
39012 71122 01
Rev. 005
Page 18 of 31
EVB Description
Nov/15