EVB71122 Datasheet, PDF (17/32 Pages) Melexis Microelectronic Systems – 300 to 930MHz Receiver Evaluation Board Description

EVB71122
300 to 930MHz Receiver
Evaluation Board Description
3.1.3 Control Word R2
Name
A
N
Bits
[4:0]
[11:5]
Description
01100
swallow counter value
value is 12
swallow counter range: 0 to 31
program counter value (bits 0 – 6)
000 0111 0111 N value is 119
N counter range: 3 to 2047
#default
#default
3.1.4 Control Word R3
N
LO2DIV
AGCEN
AGCDEL
MFO
program counter range (bits 7 – 10)
[3:0] _{000 0111 0111 N value is 119}
#default
N counter range: 3 to 2047
LO2 divider ratio
PRELIMINARY ^[4]
[5]
[7:6]
0 divide by 4
1 divide by 8
#default
AGC enable mode
0 disabled
1 enabled
#default
AGC delay settings
00 no delay
01
3/f_IFF
10 15/f_IFF
11 31/f_IFF
#default
f_IFF is the reference oscillator frequency f_RO divided by RIFF, see section 4.1.6 (R6)
multi functional output
0000 MFO is in Z state
0001 MFO is SPI read-out
[11:8]
0010 MFO = 0
0011 MFO = 1
0100 MFO is analog RO output
#default
0101 MFO is IFF output
1000 MFO is lock detector output
39012 71122 01
Rev. 001
Page 17 of 32
EVB Description
Sept/06