EVB71122 Datasheet, PDF (10/32 Pages) Melexis Microelectronic Systems – 300 to 930MHz Receiver Evaluation Board Description

EVB71122
300 to 930MHz Receiver
Evaluation Board Description
2.2.4 Counter Settings in ABC Mode – 8 Preconfigured Channels
In ABC mode (SPISEL=0), the counter settings are hard-wired. In below table all frequency units are in MHz.
FSK f_RF
f_IF1
f_LO1
N_tot
N
P
1 369.5 120.5 490.0 3675 114 32
2 371.1 121.0 492.0 3691 115 32
3 375.3 122.4 497.7 3733 116 32
4 376.9 123.0 499.9 3749 117 32
5 388.3 126.8 515.1 3863 120 32
6 391.5 127.8 519.3 3895 121 32
7 394.3 128.8 523.1 3923 122 32
8 395.9 129.3 525.2 3939 123 32
A
f_PFD
R
27 0.133 75
11 0.133 75
21 0.133 75
5 0.133 75
23 0.133 75
23 0.133 75
19 0.133 75
3 0.133 75
f_REF
f_LO2
f_IF2
10 122.5 2
10 123.0 2
10 124.4 2
10 125.0 2
10 128.8 2
10 129.8 2
10 130.8 2
10 131.3 2
A
f _FB
floor (x)
f _PFD
f _RO
R
= f_R
f _RO
f _VCO
N _tot = N ⋅ P + A
N
N _LO2
P
R
List of Mathematical Acronyms
divider ratio of the swallow counter (part of feedback divider)
PRELIMINARY frequency at the feedback divider output
The floor function gives the largest integer less than or equal to x.
For example, floor(5.4) gives 5, floor(-6.3) gives -7.
PFD frequency in locked state
reference frequency of the PLL
frequency of the crystal reference oscillator
frequency of the VCO (equals the LO1 signal of the first mixer)
total divider ratio of the PLL feedback path
divider ratio of the program counter (part of feedback divider)
LO2DIV divider ratio, to derive the LO2 signal from LO1 (N₁ = 4 or 8)
divider ratio of the prescaler (part of feedback divider)
divider ratio of the reference divider R
39012 71122 01
Rev. 001
Page 10 of 32
EVB Description
Sept/06