MDT10C61 Datasheet, PDF (6/12 Pages) Micon Design Technology Corporation – 8-bit micro-controller

MDT10C61
Watchdog Timer control
Watchdog timer disable all the time
Watchdog timer enable all the time
Oscillator-start Timer control
0ms
75ms
Power-edge Detect
PED Disable
PED Enable
(B) Program Memory
Address
000-3FF
000
004
Description
Program memory
The starting address of power on, external reset or WDT time-out reset.
Interrupt vector
7. Reset Condition for all Registers
Register
IAR
RTCC
PC
STATUS
MSR
PORT A
PORT B
INTS
TMR
CPIOA
CPIOB
PSTA
Address
00h
01h
0Ah,02h
03h
04h
05h
06h
0Bh
81h
85h
86h
87h
Power-On Reset,
xxxx xxxx
00 0000 0000
0001 1xxx
xxxx xxxx
- - -1 xxxx
xxxx xxxx
0000 0001
1111 1111
- - -1 1111
1111 1111
- - - - - -qq
/MCLR or WDT Reset
Wake-up from SLEEP
uuuu uuuu
00 0000 0000
000# #uuu
uuuu uuuu
- - -1 uuuu
uuuu uuuu
0000 000u
1111 1111
- - -1 1111
1111 1111
- - - - - -uu
uuuu uuuu
PC+1
000# #uuu
uuuu uuuu
- - -u uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
- - -u uuuu
uuuu uuuu
- - - - --uu
This specification are subject to be changed without notice. Any latest information please preview
http;//www.mdtic.com.tw
P. 6
2005/6 Ver. 1.7