MDT10P10_04 Datasheet, PDF (5/16 Pages) Micon Design Technology Corporation – 8-bit micro-controller

MDT10P10
Power Edge Detect
PED Disable
PED Enable
Security bit
Security Disable
Security Enable
The default EPROM security is disable. Once the IC was set to enable, it can not to set
to enable again.
(B) Program Memory
Address
000-3FF
3FF
Description
Program memory for MDT10P10
The starting address of the power on, external
reset or WDT time-out reset for MDT10P10
7. Reset Condition for all Registers
Register Address Power-On Reset /MCLR or WDT Reset
CPIO A
1111 1111
1111 1111
CPIO B
1111 1111
1111 1111
TMR
- - 11 1111
- - 11 1111
IAR
00h
xxxx xxxx
uuuu uuuu
RTCC
01h
xxxx xxxx
uuuu uuuu
PC
02h
1111 1111
1111 1111
STATUS
03h
0001 1xxx
000# #uuu
MSR
04h
111x xxxx
111u uuuu
PORT A
05h
- - - - xxxx
- - - - uuuu
PORT B
06h
xxxx xxxx
uuuu uuuu
Note : u unchanged, x unknown, - unimplemented, read as “0”
# value depends on the condition of the following table
Condition
/MCLR reset (not during SLEEP)
/MCLR reset during SLEEP
WDT reset (not during SLEEP)
WDT reset during SLEEP
Status: bit 4
u
1
0
0
Status: bit 3
u
0
1
0
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw P. 5
2004/1 VER 1.2