MDT10P721 Datasheet, PDF (13/21 Pages) Micon Design Technology Corporation – 8-bit micro-controller

MDT10P721
Register
CPIOB
Address
86h
Power-On Reset,
Power range detector
Reset
1111 1111
/MCLR or WDT Reset
1111 1111
Wake-up from SLEEP
uuuu uuuu
CPIOC
87h
1111 1111
1111 1111
uuuu uuuu
PIEB1
8Ch
-0-- 0000
-0-- 0000
-u-- uuuu
PSTA
8Eh
---- --0u
---- --uu
---- --uu
T2PER
92h
1111 1111
1111 1111
1111 1111
SCMSTA
94h
---- ---0
---- ---0
---- ---u
ADS1
9Fh
---- -000
---- -000
Note : u unchanged, x unknown, - unimplemented, read as “0”
# value depends on the condition of the following table
---- -uuu
Condition
Status: bit 4
Status: bit 3
PSTA: bit 1
PSTA: bit 0
/MCLR reset (not during SLEEP)
u
u
u
u
/MCLR reset during SLEEP
1
0
u
u
WDT reset (not during SLEEP)
0
1
u
u
WDT reset during SLEEP
0
0
u
u
Power-on reset
1
1
0
X
Power-range reset
1
1
u
0
8. Instruction Set :
Instruction Code
010000 00000000
010000 00000001
010000 00000010
010000 00000011
010000 00000100
010000 00000rrr
010001 1rrrrrrr
011000 trrrrrrr
111010 iiiiiiii
010111 trrrrrrr
011001 trrrrrrr
011010 trrrrrrr
011011 trrrrrrr
Mnemonic
Operands
NOP
CLRWT
SLEEP
TMODE
RET
CPIO R
STWR R
LDR R, t
LDWI I
SWAPR R, t
Function
No operation
Clear Watchdog timer
Sleep mode
Load W to TMODE register
Return from subroutine
Control I/O port register
Store W to register
Load register
Load immediate to W
Swap halves register
INCR R, t
INCRSZ R, t
ADDWR R, t
Increment register
Increment register, skip if zero
Add W and register
Operating
Status
None
0 WT
0 WT, stop OSC
W TMODE
Stack PC
W CPIO r
WR
Rt
IW
[R(0~3) ↔R(4~7)]
t
R+1 t
R+1 t
W+R t
TF, PF
TF, PF
None
None
None
None
Z
None
None
Z
None
C, HC, Z
This specification are subject to be changed without notice. Any latest information
please preview http;//www.mdtic.com.tw
P. 13
2005/6 Ver. 2.0