MX10E80501 Datasheet, PDF (50/88 Pages) Macronix International – On-chip Flash program memory with in-system programming

PRELIMINARY
MX10E8050I /
MX10E8050IA
Data
MR
Successful Reception
from a Slave Transmitter
S
SLA
R
A
08H
40H
Next Transfer Started with a Repeated Start Condition
Data
Not Acknowledge Received after the Slave Address
A
P
48H
Arbitration Lost in Slave Address or Acknowledge Bit
Arbitration Lost and Addressed as Slave
A or A
Other MST
Continues
38H
A
Other MST
Continues
68H 78H 80H
A
Data
A
P
50H
58H
S
SLA
R
10H
W
To MST/TRX Mode
Entry = MT
A
Other MST
Continues
38H
To Corresponding
States in Slave Mode
From Master to Slave
From Slave to Master
Data
A
Any Number of Data Bytes and Their Associated Acknowledge Bits
n
This Number (Contained in S1STA) Corresponds to a Defined State of the I²C Bus. See Table 22.
Figure 21. Format and States in the Master Receiver Mode
P/N:PM0887 Specifications subject to change without notice, contact your sales representatives for the most update information. REV. 1.6, MAR. 28, 2005
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