MX69F162 Datasheet, PDF (32/51 Pages) Macronix International – 16M-BIT [X16] FLASH AND 2M-BIT/4M-BIT [X16] SRAM MIXED MULTI CHIP PACKAGE MEMORY

MX69F162/164C3BT/B
Figure 9. Erase Suspend/Resume Flowchart
Start
Write B0H
Write 70H
Read
Status Register
SR.7=
1
SR.6=
1
Write FFH
0
0
Erase Completed
Read Array Data
No
Done Reading
Yes
Write D0H
Write FFH
Bus
Command Comments
Operation
Write
Erase
Data=B0H
Suspend Addr=X
Write
Read Status Data=70H
Addr=X
Read
Status Register Data Toggle
CEf# or OEf# to Update
Status Register Data
Addr=X
Standby
Check SR.7
1=WSM Ready
0=WSM Busy
Stanby
Check SR.6
1=Erase Suspended
0=Erase Completed
Write
Read Array Data=FFH
Addr=X
Read
Read array data from
sector other than the one
being erased.
Write
Erase
Data=D0H
Resume
Addr=X
Erase Write Resumed
Read Array Data
P/N:PM1083
REV. 0.2, MAY 20, 2004
32