MX25L12855EMI-10G Datasheet, PDF (30/81 Pages) Macronix International – HIGH PERFORMANCE SERIAL FLASH SPECIFICATION

MX25L6455E
MX25L12855E
Table 6. ID Definitions
Command Type
RDID
RES
REMS/REMS2/
REMS4/REMS4D
manufacturer ID
C2
manufacturer ID
C2
MX25L6455E
memory type
26
electronic ID
87
device ID
87
memory density manufacturer ID
17
C2
manufacturer ID
C2
MX25L12855E
memory type
26
electronic ID
88
device ID
88
memory density
18
(25) Enter Secured OTP (ENSO)
The ENSO instruction is for entering the additional 4K-bit Secured OTP mode. The additional 4K-bit Secured OTP
is independent from main array, which may use to store unique serial number for system identifier. After entering
the Secured OTP mode, and then follow standard read or program, procedure to read out the data or update data.
The Secured OTP data cannot be updated again once it is lock-down.
The sequence of issuing ENSO instruction is: CS# goes low→ sending ENSO instruction to enter Secured OTP
mode→ CS# goes high.
Please note that WRSR/WRSCUR/WPSEL/SBLK/GBLK/SBULK/GBULK/CE/BE/SE/BE32K commands are not ac-
ceptable during the access of secure OTP region, once Security OTP is lock down, only read related commands
are valid.
(26) Exit Secured OTP (EXSO)
The EXSO instruction is for exiting the additional 4K-bit Secured OTP mode.
The sequence of issuing EXSO instruction is: CS# goes low→ sending EXSO instruction to exit Secured OTP
mode→ CS# goes high.
(27) Read Security Register (RDSCUR)
The RDSCUR instruction is for reading the value of Security Register. The Read Security Register can be read at
any time (even in program/erase/write status register/write security register condition) and continuously.
The sequence of issuing RDSCUR instruction is : CS# goes low→ sending RDSCUR instruction → Security Regis-
ter data out on SO→ CS# goes high.
The definition of the Security Register is as below:
Secured OTP Indicator bit. The Secured OTP indicator bit shows the chip is locked by factory before ex- factory
or not. When it is "0", it indicates non-factory lock; "1" indicates factory- lock.
Lock-down Secured OTP (LDSO) bit. By writing WRSCUR instruction, the LDSO bit may be set to "1" for cus-
tomer lock-down purpose. However, once the bit is set to "1" (lock-down), the LDSO bit and the 4K-bit Secured
OTP area cannot be update any more. While it is in 4K-bit Secured OTP mode, array access is not allowed.
P/N: PM1467
REV. 1.4, FEB. 10, 2012
30