MX29LV640BU Datasheet, PDF (27/64 Pages) Macronix International – 64M-BIT [4M x 16] CMOS EQUAL SECTOR FLASH MEMORY

still open. If Q3 is high ("1") the internally controlled erase
cycle has begun; attempts to write subsequent commands
to the device will be ignored until the erase operation is
completed as indicated by Data Polling or Toggle Bit. If
Q3 is low ("0"), the device will accept additional sector
erase commands. To insure the command has been ac-
cepted, the system software should check the status of
Q3 prior to and following each subsequent sector erase
command. If Q3 were high on the second status check,
the command may not have been accepted.
If the time between additional erase commands from the
system can be less than 50us, the system need not to
monitor Q3.
RY/BY#:READY/BUSY# OUTPUT
The RY/BY# is a dedicated, open-drain output pin that
indicates whether an Embedded Algorithm is in progress
or complete. The RY/BY# status is valid after the rising
edge of the final WE# pulse in the command sequence.
Since RY/BY# is an open-drain output, several RY/BY#
pins can be tied together in parallel with a pull-up resistor
to VCC .
If the output is low (Busy), the device is actively erasing
or programming. (This includes programming in the Erase
Suspend mode.) If the output is high (Ready), the device
is ready to read array data (including during the Erase
Suspend mode), or is in the standby mode.
MX29LV640BU
P/N:PM1081
REV. 1.0, MAR. 08, 2005
27