MX25L12875F Datasheet, PDF (2/102 Pages) Macronix International – 3V 128M-BIT [x 1/x 2/x 4] CMOS MXSMIO (SERIAL MULTI I/O) FLASH MEMORY

MX25L12875F
Contents
1. FEATURES............................................................................................................................................................... 4
2. GENERAL DESCRIPTION...................................................................................................................................... 6
Table 1. Read performance Comparison.....................................................................................................6
3. PIN CONFIGURATIONS .......................................................................................................................................... 7
4. PIN DESCRIPTION................................................................................................................................................... 7
5. BLOCK DIAGRAM.................................................................................................................................................... 8
6. DATA PROTECTION................................................................................................................................................. 9
Table 2. Protected Area Sizes....................................................................................................................10
Table 3. 4K-bit Secured OTP Definition..................................................................................................... 11
7. Memory Organization............................................................................................................................................ 12
Table 4. Memory Organization...................................................................................................................12
8. DEVICE OPERATION............................................................................................................................................. 13
8-1. Quad Peripheral Interface (QPI) Read Mode........................................................................................... 15
9. COMMAND DESCRIPTION.................................................................................................................................... 16
Table 5. Command Set...............................................................................................................................16
9-1. Write Enable (WREN)............................................................................................................................... 20
9-2. Write Disable (WRDI)................................................................................................................................ 21
9-3. Read Identification (RDID)........................................................................................................................ 22
9-4. Release from Deep Power-down (RDP), Read Electronic Signature (RES)............................................ 23
9-5. Read Electronic Manufacturer ID & Device ID (REMS)............................................................................ 25
9-6. QPI ID Read (QPIID)................................................................................................................................ 26
Table 6. ID Definitions ...............................................................................................................................26
9-7. Read Status Register (RDSR).................................................................................................................. 27
9-8. Read Configuration Register (RDCR)....................................................................................................... 28
Table 7. Configuration Register Table........................................................................................................32
9-9. Write Status Register (WRSR).................................................................................................................. 34
Table 8. Protection Modes..........................................................................................................................35
9-10. Read Data Bytes (READ)......................................................................................................................... 38
9-11. Read Data Bytes at Higher Speed (FAST_READ)................................................................................... 39
9-12. Dual Output Read Mode (DREAD)........................................................................................................... 40
9-13. 2 x I/O Read Mode (2READ).................................................................................................................... 41
9-14. Quad Read Mode (QREAD)..................................................................................................................... 42
9-15. 4 x I/O Read Mode (4READ).................................................................................................................... 43
9-16. Burst Read................................................................................................................................................ 45
9-17. Performance Enhance Mode.................................................................................................................... 46
9-18. Performance Enhance Mode Reset ......................................................................................................... 49
9-19. Fast Boot.................................................................................................................................................. 50
9-20. Sector Erase (SE)..................................................................................................................................... 53
9-21. Block Erase (BE32K)................................................................................................................................ 54
9-22. Block Erase (BE)...................................................................................................................................... 55
9-23. Chip Erase (CE)........................................................................................................................................ 56
9-24. Page Program (PP).................................................................................................................................. 57
9-25. 4 x I/O Page Program (4PP)..................................................................................................................... 59
P/N: PM1855
REV. 1.1, OCT. 31, 2013
2