97SD3240_06 Datasheet, PDF (29/39 Pages) Maxwell Technologies – 1.25Gb SDRAM 8-Meg X 40-Bit X 4-Banks

1.25Gb (8-Meg X 40-Bit X 4-Banks) SDRAM
97SD3240
2. Same bank: The consecutive write command ( the same bank) is illegal.
Read with Auto Precharge to Write command interval
1. Different bank: When some banks are in the active state, the second write command (another bank) is
executed. However, DQM must be set High so that the output buffer becomes High-Z before data input. The
internal auto-precharge of one bank starts at the next clock of the second command.
Read with Auto Precharge to Write Command Interval (Different bank)
2. Same bank: The consecutive write command from read with auto precharge ( the same bank) is illegal. It
is necessary to separate the two commands with a bank active command.
Write with Auto Precharege to Read command interval
1. Different bank: When some banks are in the active state, the second read command (another bank) is
executed. However, in the case of a burst write, data will continue to be written until one clock before the
read command is executed. The internal auto precharge of one bank starts at the next clock of the second
command.
Write with Auto Precharge to Read command Interval (Different bank)
05.10.06 Rev 4
All data sheets are subject to change without notice 29
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