97SD3240_06 Datasheet, PDF (10/39 Pages) Maxwell Technologies – 1.25Gb SDRAM 8-Meg X 40-Bit X 4-Banks

1.25Gb (8-Meg X 40-Bit X 4-Banks) SDRAM
97SD3240
DQM Truth Table
COMMAND
SYMBOL
CKE = N-1
CKE = N
DQM
Byte (DQ0 to DQ39) write enable/output
ENB
H
x
L
enable
Byte (DQ0 to DQ39) write inhibit/output dis- MASK
H
x
H
able
Note: H: V_IH L: V_IL x V_IH or V_IL
Write: I_DID is Needed
Read: I_DOD is Needed
The SDRAM can mask input/output data by means of DQM.
During reading, the output buffer is set to Low-Z by setting DQM to Low, enabling data output. On the other
hand, when DQM is set High, the output buffer becomes High-Z, disabling data output.
During writing, data is written by setting DQM to Low. When DQM is set to High, the previous data is held
( the new data is not written). Desired data can be masked during burst read or burst write by setting DQM..
For more details, refer to the DQM control section of the SDRAM operating instructions.
CKE Truth Table
CURRENT STATE
COMMAND
N-1
N
CS
RAS CAS
WE ADDRESS
Active
Clock suspended mode entry
H
L
x
x
x
x
x
Any
Clock Suspend
L
L
x
x
x
x
x
Clock Suspend Clock Suspend mode exit
L
H
x
x
x
x
x
Idle
Auto-refresh command (REF)
H
H
L
L
L
H
x
Idle
Self-refresh entry (SELF)
H
L
L
L
L
H
x
Idle
Power down entry
H
L
L
H
H
H
x
H
L
HL
x
x
x
x
Self Refresh
Self Refresh exit (SELFX)
L
H
L
H
H
H
x
Power down
Power down exit
L
H
L
H
H
H
x
L
H
H
x
x
x
x
Note: H:V_IH L:V_IL x V_IH or V_IL
05.10.06 Rev 4
All data sheets are subject to change without notice 10
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