MAX690T_05 Datasheet, PDF (9/12 Pages) Maxim Integrated Products – 3.0V/3.3V Microprocessor Supervisory Circuits

3.0V/3.3V Microprocessor Supervisory Circuits
3.0V OR 3.3V
1N4148
0.47F
V_CC MAX690T/S/R V_OUT
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
VBATT MAX805T/S/R RESET
MAX806T/S/R (RESET)
GND
TO STATIC
RAM
TO μP
+5V
3.0V OR
3.3V
1N4148
0.47F
V_CC MAX690T/S/R V_OUT
MAX704T/S/R
MAX802T/S/R
MAX804T/S/R
VBATT MAX805T/S/R RESET
MAX806T/S/R (RESET)
GND
TO STATIC
RAM
TO μP
a
( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY
Figure 3. Using a SuperCap as a Backup Power Source
b
( ) ARE FOR MAX804T/S/R, MAX805T/S/R ONLY
Connecting an ordinary signal diode in series with R3,
as shown in Figure 4b, causes the lower trip point (V_L)
to coincide with the trip point without hysteresis (V_TRIP),
so the entire hysteresis window occurs above V_TRIP.
This method provides additional noise margin without
compromising the accuracy of the power-fail threshold
when the monitored voltage is falling. It is useful for
accurately detecting when a voltage falls past a
threshold.
The current through R1 and R2 should be at least 1µA to
ensure that the 25nA (max over extended temperature
range) PFI input current does not shift the trip point. R3
–sP—hF—oOu–ldpibne.
larger than 10kΩ so it does not load
Capacitor C1 adds additional noise
down the
rejection.
Monitoring an Additional Power Supply
These µP supervisors can monitor either positive or
nPµPeFgI.(aFit–Pg—ivFu—erOe–s5uc)pa.npClbieoesnunusesecidntingtgoa–gP—reF—enOse–isrtatooter–M—avR–noltionantgeetrhruedpiMvt iAdtXoe7rt0hto4e
and MAX806 causes reset to assert when the
amafstosenerirt–Pot—erF—deOd–asgsuolopenpsglhyaiggsho–P.—eFs—Oo–uht ^{ooldf sto–Mle—rR–anlocwe.,}
Reset remains
and for 200ms
Interfacing to µPs
with Bidirectional Reset Pins
µPs with bidirectional reset pins, such as the Motorola
6M8AHXC70141_/sMeAr iXe8s0, _{2c_a/MnAcXo8n0t6e_n–dR—E—wS—i} tE—hT–t hoeutpMuAt.X
69
If,
0_/
for
example, the ^{–R—E—S—E—T–} output is driven high and the µP
wants to pull it low, indeterminate logic levels may
result.
between
To
the
c–R—oE—rrS—eEc—Tt–
Figure 6. Buffer the
this, connect a 4.7kΩ resistor
–oR—uE—tpS—uEt—aT–ndoutthpeuµt ^{PtoreostehteIr/Os,ysatsemin}
components.
Negative-Going V_CC Transients
While issuing resets to the µP during power-up, power-
down, and brownout conditions, these supervisors are
relatively immune to short-duration negative-going V_CC
transients (glitches). It is usually undesirable to reset
the µP when V_CC experiences only small glitches.
Figure 7 shows maximum transient duration vs. reset-
comparator overdrive, for which reset pulses are not
generated. The graph was produced using negative-
going V_CC pulses, starting at 3.3V and ending below
the reset threshold by the magnitude indicated (reset
comparator overdrive). The graph shows the maximum
pulse width a negative-going V_CC transient may
typically have without causing a reset pulse to be
issued. As the amplitude of the transient increases
(i.e., goes farther below the reset threshold), the
maximum allowable pulse width decreases. Typically,
a V_CC transient that goes 100mV below the reset
threshold and lasts for 40µs or less will not cause a
reset pulse to be issued.
A 100nF bypass capacitor mounted close to the V_CC
pin provides additional transient immunity.
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