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MAX5037 Datasheet, PDF (9/30 Pages) Maxim Integrated Products – VRM 9.0, Dual-Phase, Parallelable, Average Current-Mode Controller | |||
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VRM 9.0, Dual-Phase, Parallelable,
Average Current-Mode Controller
Pin Description
PIN
1â4, 44
NAME
FUNCTION
VID3âVID0,
VID4
DAC Code Inputs. VID0 is the LSB and VID4 is the MSB for the internal 5-bit DAC (Table 1). Connect to
SGND for logic low or leave open circuit for logic high. These inputs have 12k⦠internal pullup
resistors to an internal 3V regulator.
5, 20, 35
6
7, 43
8
SGND
Signal Ground. Ground connection for the internal circuitry. QFN package exposed pad connected to
SGND.
OVPIN
Overvoltage Protection Circuit Input. Connect DIFF to OVPIN. When OVPIN exceeds +13% above the
VID programmed output voltage, OVPOUT latches DH_ low and DL_ high. Toggle EN low to high or
recycle the power to reset the latch.
CLP1, CLP2 Current-Error Amplifier Output. Compensate the current loop by connecting an R-C network to ground.
OVPOUT
Overvoltage Protection Output. Use the OVPOUT active-high, push-pull output to trigger a safety
device such as an SCR.
Power-Good Output. The open-drain, active-low PGOOD output goes low when the VID programmed
9
PGOOD
output voltage falls out of regulation or a phase failure is detected. The power-good window
comparator thresholds are +8% and -10% of the VID programmed output voltage. Forcing EN low also
forces PGOOD low.
Differential Output Voltage-Sensing Positive Input. Used to sense a remote load. Connect SENSE+ to
10
SENSE+ VOUT+ at the load. The device regulates the difference between SENSE+ and SENSE- according to the
programmed VID code and adaptive voltage positioning.
11
SENSE- Differential Output Voltage-Sensing Negative Input. Used to sense a remote load. Connect SENSE- to
VOUT- or PGND at the load.
12
DIFF
Differential Remote-Sense Amplifier Output. DIFF is the output of a precision unity-gain amplifier.
13
EAN
Voltage-Error Amplifier Inverting Input. Receives the output of the differential remote-sense amplifier.
Referenced to SGND.
14
EAOUT
Voltage-Error Amplifier Output. Connect to an external, gain-setting feedback resistor. The error
amplifier gain determines the output voltage load regulation for adaptive voltage positioning.
REG Input. A resistor on REG applies the same voltage-positioning window at different VRM voltage
15
REG
settings. For a no-load output voltage (VCORE) equal to VID, set RREG = RF, where the RF is the
feedback resistor of the voltage-error amplifier. VREG internally regulates to the programmed VID
output voltage.
16, 39
17, 40
18
19
21, 33, 37
22, 34
23, 32
CSP1, CSP2
Current-Sense Differential Amplifier Positive Input. Senses the inductor current. The differential voltage
between CSP_ and CSN_ is amplified internally by the current-sense amplifier gain of 18.
CSN1,
CSN2
Current-Sense Differential Amplifier Negative Input. Senses the inductor current.
CNTR
EN
N.C.
Adaptive Voltage Center Position Input. Connect a resistor between CNTR and SGND to program the
center of the adaptive VOUT position. VCNTR regulates to +1.22V.
Output Enable. A logic low shuts down the power drivers. EN has an internal 5µA pullup current.
No Connection. Not internally connected.
BST1, BST2 Boost Flying-Capacitor Connection. Reservoir capacitor connection for the high-side FET driver
supply. Connect 0.47µF ceramic capacitors between BST_ and LX_.
DH1, DH2 High-Side Gate-Driver Output. Drives the gate of the high-side MOSFET.
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