MAX16126 Datasheet, PDF(9/19 Page) Maxim Integrated Products – Load-Dump/Reverse-Voltage Protection Circuits

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MAX16126/MAX16127

Load-Dump/Reverse-Voltage Protection Circuits

Detailed Description

The MAX16126/MAX16127 transient protection circuits are

suitable for automotive and industrial applications where

high-voltage transients are commonly present on supply

voltage inputs. The devices monitor the input voltage and

control two external common-source n-channel MOSFETs

to protect downstream voltage regulators during load-

dump events or other automotive pulse conditions.

The devices feature an overvoltage and an undervoltage

comparator for voltage window detection. A flag output

(FLAG) asserts when a fault event occurs.

Two external back-to-back n-channel MOSFETs provide

reverse-voltage protection and also prevent reverse cur-

rent during a fault condition. Compared to a traditional

reverse-battery diode, this approach minimizes power

dissipation and voltage drop, and allows the circuit to

operate at very low cold-crank voltages (3V minimum).

The MAX16127 provides a limiter-mode fault manage-

ment for overvoltage and thermal shutdown conditions,

whereas the MAX16126 provides switch-mode fault

management for overvoltage and thermal shutdown con-

ditions. In the limiter mode, the MOSFETs cycle on and

off so the output voltage is limited. In the switch mode,

the external MOSFETs are switched off, disconnecting

the load from the input. In both cases, FLAG asserts to

indicate a fault.

Gate Charge Pump

The MAX16126/MAX16127 use a charge pump to gener-

ate the GATE to SRC voltage and enhance the external

MOSFETs. After the input voltage exceeds the input

undervoltage threshold, the charge pump turns on after

a 150Fs delay.

During a fault condition, GATE is pulled to ground with

a 8.8mA (min) pulldown current. Note that an external

zener diode is required to be connected between the

gate and source of the external MOSFETs. See the

Applications Information section.

Overvoltage Protection

The MAX16126/MAX16127 detect overvoltage condi-

tions using a comparator that is connected through an

external resistive divider to the input or output voltage.

An overvoltage condition causes the GATE output to go

low, turning off the external MOSFETs. FLAG also asserts

to indicate the fault condition.

Overvoltage Limiter (MAX16127)

In overvoltage limiter mode, the output voltage is regu-

lated at the overvoltage threshold voltage and continues

to supply power to downstream devices. In this mode,

the device operates like a voltage regulator.

During normal operation, GATE is enhanced 7V above

SRC. The output voltage is monitored through a resis-

tive divider between OUT and OVSET. When OUT rises

above the overvoltage threshold, GATE goes low and

the MOSFETs turn off. As the voltage on OUT falls below

the overvoltage threshold minus the threshold hysteresis,

GATE goes high and the MOSFETs turn back on again,

regulating OUT in a switched-linear mode at the overvolt-

age threshold.

The switching frequency depends on the gate charge of

the MOSFETs, the charge-pump current, the output load

current, and the output capacitance.

Caution must be exercised when operating the

MAX16127 in voltage-limiting mode for long durations.

Since MOSFETs can dissipate power continuously during

this interval, proper heat sinking should be implemented

to prevent damage to them.

Overvoltage Switch (MAX16126)

In the overvoltage switch mode, the internal overvolt-

age comparator monitors the input voltage and the load

is completely disconnected from the input during an

overvoltage event. When the input voltage exceeds the

overvoltage threshold, GATE goes low and the MOSFETs

turn off, disconnecting the input from the load. After that,

for the autoretry mode version, the autoretry timer starts,

while for the latched mode version a power cycle to IN or

a cycle on SHDN is needed to turn the external MOSFETs

back on.

The MAX16126 can be configured to latch off (suffix D)

even after the overvoltage condition ends. The latch is

cleared by cycling IN below the undervoltage threshold

or by toggling SHDN.

The devices can also be configured to retry:

U One time, then latch off (suffix B)

U Three times, then latch off (suffix C)

U Always retry and never latch off (suffix A)

There is a fixed 150ms (typ) delay between each retry

attempt. If the overvoltage fault condition is gone when

a retry is attempted, GATE goes high and power is

restored to the downstream circuitry.

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