MAX16016_11 Datasheet, PDF (9/21 Pages) Maxim Integrated Products – Low-Power μP Supervisory Circuits with Battery-Backup Circuit and Chip-Enable Gating

Low-Power µP Supervisory Circuits with
Battery-Backup Circuit and Chip-Enable Gating
Pin Description—MAX16016
PIN
NAME
FUNCTION
1
V_CC
Supply Voltage Input. Bypass V_CC to GND with a 0.1µF capacitor.
Backup Battery Input. If V_CC falls below its reset threshold, and if V_BATT > V_CC, OUT connects to
2
BATT BATT. If VCC rises above 1.01 x VBATT, OUT connects to VCC. Bypass BATT to GND with a 0.1µF
capacitor.
Active-Low Manual Reset Input. RESET asserts when MR is pulled low. RESET remains low for the
3
MR
duration of reset timeout period after MR transitions from low to high. Connect MR to OUT or leave
unconnected if not used. MR is internally connected to V_CC through a 30kΩ pullup resistor.
Power-Fail Comparator Input. Connect PFI to a resistive divider to set the desired PFI threshold. The
4
PFI
PFI input is referenced to an internal V_PFT threshold. A V_PFT-HYS internal hysteresis provides noise
immunity. The power-fail comparator is powered from OUT.
Watchdog Timer Input. If WDI remains high or low for longer than the watchdog timeout period (t_WD),
5
WDI
the internal watchdog timer runs out and a reset pulse is triggered for the reset timeout period. The
internal watchdog clears when reset asserts or whenever WDI sees a rising or falling edge. To
disable the watchdog feature, leave WDI unconnected or three-state the driver connected to WDI.
6
BATTON Active-High Battery-On Output. BATTON goes high when in battery-backup mode.
7
PFO
Active-Low Power-Fail Comparator Output. PFO goes low when V_PFI falls below the internal V_PFT
threshold and goes high when V_PFI rises above V_PFT + V_PFT-HYS hysteresis.
8
GND Ground
Active-Low Reset Output. RESET asserts when V_CC falls below the reset threshold or MR is pulled low.
9
RESET RESET remains low for the duration of the reset timeout period after V_CC rises above the reset threshold
and MR goes high. RESET also asserts low when the internal watchdog timer runs out.
Switched Output. OUT is connected to V_CC when the reset output is not asserted or when V_CC is
10
OUT
greater than V_BATT. OUT connects to BATT when RESET is asserted and V_BATT is greater than V_CC.
Bypass OUT to GND with a 0.1µF (min) capacitor.
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