MAX1426 Datasheet, PDF (9/16 Pages) Maxim Integrated Products – 10-Bit, 10Msps ADC

10-Bit, 10Msps ADC
PIN
1, 7
2, 8
3
4
5
6
9
10
11
12
13
14
15
16–19
20, 22
21, 23
24–27
28
NAME
AGND
AV_DD
REFP
REFIN
REFN
CML
INP
INN
CMLP
CMLN
CLK
OE/PD
D9
D8–D5
DV_DD
DGND
D4–D1
D0
Pin Description
FUNCTION
Analog Ground. Connect all return paths for analog signals to these pins.
Analog Supply Voltage Input. Bypass with a parallel combination of 2.2µF, 0.1µF, and 100pF capacitors
to AGND. Bypass each supply input to the closest AGND (e.g., capacitors between pins 1 and 2).
Positive Reference Output. Bypass to AGND with a 0.1µF capacitor. If the internal reference is
disabled, REFP can accept an external voltage.
External Reference Input. Bypass to AGND with a 0.1µF capacitor. REFIN can be biased externally
to adjust the reference level and calibrate full-scale errors. To disable the internal reference, connect
REFIN to AGND.
Negative Reference Output. Bypass to AGND with 0.1µF capacitor. REFN can accept an external
voltage when the internal reference is disabled (REFN = AGND).
Common-Mode Level Input. Bypass to AGND with a 0.1µF capacitor. CML can accept an external
voltage when the internal reference is disabled (REFN = AGND).
Positive Analog Signal Input
Negative Analog Signal Input
Common-Mode Level Positive Input. For AC applications, connect to AV_DD to internally set the input
DC bias level. For DC-coupled applications, connect to AGND.
Common-Mode Level Negative Input. Connect to AGND to internally set the input DC bias level for
both AC- and DC-coupled applications.
Clock Input. Clock frequency range from 0.1MHz to 10MHz.
Active-Low Output Enable and Power-Down Input. Digital outputs become high impedance and
device enters low-power mode when pin is high.
Digital Data Output (MSB)
Digital Data Outputs 8–5
Digital Supply Voltage Input. Bypass with 2.2µF and 0.1µF capacitors in parallel. Digital supply can
operate with voltages as low as +2.7V.
Digital Ground
Digital Data Outputs 4–1
Digital Data Output (LSB)
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