DS33Z44 Datasheet, PDF (88/181 Pages) Maxim Integrated Products – Quad Ethernet Mapper

DS33Z44 Quad Ethernet Mapper
Register Name:
Register Description:
Register Address:
GL.C4QPR
Connection 4 Queue Pointer Reset
15h
Bit #
7
6
5
4
3
2
1
0
Name
-
-
-
-
C4MRPRR C4HWPRR C4MHPR C4HRPR
Default
0
0
0
0
0
0
0
0
Bit 3: MAC Read Pointer Reset. If this bit is set to 1, the receive queue read pointer is reset for connection 4. The
queue pointer must be reset after a disconnect and before a connection.
Bit 2: HDLC Write Pointer Reset. If this bit is set to 1, the receive queue write pointer is reset for connection 4.
The queue pointer must be reset after a disconnect and before a connection.
Bit 1: HDLC Read Pointer Reset. If this bit is set to 1, the receive queue read pointer is reset for connection 4.
The queue pointer must be reset after a disconnect and before a connection.
Bit 0: MAC Transmit Write Pointer Reset. If this bit is set to 1, the receive queue write pointer is reset for
connection 4. The queue pointer must be reset after a disconnect and before a connection.
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