MAX1660 Datasheet, PDF (8/20 Pages) Maxim Integrated Products – Digitally Controlled Fuel-Gauge Interface

Digitally Controlled
Fuel-Gauge Interface
but limits the maximum measurable current. Likewise, a
smaller conversion gain (smaller R_CS) decreases resolu-
tion at low currents, but increases the maximum mea-
surable current. A 30mΩ current-sense resistor (A_C =
12.5 x 10³ counts per Coulomb) provides a good bal-
ance between resolution and input current range for
many applications. With this current-sense resistance,
the MAX1660 typically measures currents from 600µA to
4A with better than 1% accuracy (see the section
Choosing R_CS).
Charge and Discharge Counters
Figure 3 shows the functional diagram of the MAX1660’s
Coulomb-counter section. The Coulomb counter’s out-
put increments (but never decrements) one of two inde-
pendent 32-bit counters: CHGCOUNT for charging
currents, and DISCOUNT for discharging currents. By
independently counting the charge and discharge cur-
rents, the MAX1660 can accommodate any algorithm to
account for a battery pack’s energy-conversion efficien-
cy. A 2x1 multiplexer, gated by the configuration word’s
SETCOUNT bit, determines which counter’s contents
are passed to the COUNT register when COUNT
updates. The 32-bit COUNT register is divided into
4 bytes: COUNT0 (the least significant) through
COUNT3 (the most significant). See Table 1 for a
description of the different registers.
CHGCOUNT and DISCOUNT reset to zero whenever a
power-on reset executes, or when the configuration
word’s CLRCOUNTER bit is set. Each counter also
resets any time an overflow condition occurs. The coun-
ters’ 32-bit capacity allows them to continually monitor
4A for almost 24 hours before overflowing (with R_CS =
30mΩ). When a counter overflows, it simply clears and
begins counting from 0; no interrupts are generated.
Execute the ReadCount01 and ReadCount23 com-
mands to read the active counter’s contents at any time
(Table 2). Since the Read-Word protocol supports only
16-bit data transfers, issue these commands sequen-
tially to read the entire 32-bit COUNT register. First
issue ReadCount01 to read COUNT0 and COUNT1,
and then issue ReadCount23 to read COUNT2 and
COUNT3. Executing ReadCount01 enables updating of
the COUNT register; the COUNT register updates on
SCL’s falling edge after the command-byte ACK bit
DIRINTENABLE
OFFSETMEAS
COULOMB
COUNTER
DIRCHANGE
CHARGESTATUS
CHGCOUNT
DISCOUNT
CLRCOUNTER
SETCOUNT
COUNTSTATUS
32 32
2 x 1 MUX
MUXOUT
32
ReadCount01
ReadCount23
8
8
8
8
COUNT3 COUNT2 COUNT1 COUNT0
8
8
8
8
SMB INTERFACE
LATCH
LOGIC
Figure 3. Coulomb Counter Functional Diagram
Table 1. Register Descriptions
REGISTER NAME
DESCRIPTION
CHGCOUNT
The 32-bit counter that accumulates the number of units of charge that have passed through R_CS in the charg-
ing direction since CHGCOUNT was last cleared. CHGCOUNT clears on a power-on reset, or when the config-
uration word’s CLEARCOUNTER bit is set. CHGCOUNT is unaffected by discharging currents.
DISCOUNT
The 32-bit counter that accumulates the number of units of charge that have passed through R_CS in the dis-
charging direction since DISCOUNT was last cleared. DISCOUNT clears on a power-on reset, or when the
configuration word’s CLEARCOUNTER bit is set. DISCOUNT is unaffected by charging currents.
COUNT
The 32-bit register that stores the value held in the counter selected by the configuration word’s SETCOUNT bit
when updating has been enabled by the ReadCount01 command. Data transfers to COUNT from the selected
CHGCOUNT or DISCOUNT register whenever the MAX1660’s SMBus interface detects a new command. See
the Charge and Discharge Counters section.
COMP
The 32-bit register that stores the host-defined COUNT threshold. The contents of COMP are continuously com-
pared with the contents of either CHGCOUNT or DISCOUNT (whichever is selected by the SETCOUNT bit) for
equality. When an equality occurs, the configuration word’s COMPSTATUS bit is set, and an interrupt is gener-
ated (INT goes low).
*Patent pending
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