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MAX1660 Datasheet, PDF (17/20 Pages) Maxim Integrated Products – Digitally Controlled Fuel-Gauge Interface
Digitally Controlled
Fuel-Gauge Interface
Set the current at which the ODI voltage falls below
AGND with a voltage divider placed between REF and
CS (Figure 10b). To set the overdischarge threshold,
choose R3 in the 1MΩ range, then calculate R4 from:
R4 = R3 IDISCHG,MAXRCS
VREF
where VREF = 2.00V, IDISCHG,MAX is the maximum
allowable discharging current, and RCS is the current-
sense resistor value.
Lowpass filter the ODI and OCI inputs with C4 and C5
(Figure 10) to prevent short current pulses from tripping
the overcurrent thresholds. Use the smallest capaci-
tances that provide the desired filtering; large capaci-
tances slow the MAX1660’s response to overcurrent
conditions.
MAX1660’s digital compare function to limit activity on
the digital data lines during the measurement. By
removing the requirement that the host poll the
MAX1660 to determine when a counter has reached
the desired value, the MAX1660 requires no digital
switching while it accumulates sensitive data. See
Digital Compare Function section.
Exiting Hard-Shutdown Mode
In most applications, hard-shutdown mode is used only
when the battery pack has become fully discharged, at
which point the pack’s load current must be minimized
to prevent cell overdischarge. When the MAX1660’s
host is powered from VL, which turns off in hard-
shutdown mode, the host is unable to signal the
MAX1660 to exit hard-shutdown mode. Figure 8’s cir-
cuit demonstrates a simple topology that handles this
situation.
Internal Offset Measurement
Although the MAX1660 has extremely low input offset
error, some low-current, high-precision applications
may require accounting for this offset. Set the configu-
ration word’s OFFSETMEAS bit to disconnect the
Coulomb-counter input from the external circuitry and
internally short it to AGND. Subtract the resulting offset
current from succeeding measurements to correct for
the internal offset.
Clear OFFSETMEAS to resume normal operation. Note
that since the Coulomb-counting circuitry is disconnect-
ed from the current-sense resistor during this measure-
ment, currents that flow through the sense resistor when
OFFSETMEAS is set do not increment the counters.
Ensure that the command to measure the internal offset
contains a low byte of 0xA (ODHI = OCHI = 1, ODLO =
OCLO = 0) to force the FETs off and disconnect the
load. Although the MAX1660 cannot perform its
Coulomb-counting function while in offset-measurement
mode, the overcurrent comparators are still active.
Improving Measurement Accuracy
Filtering the Input
Place a 100Ω resistor (R2) between RCS and the CS pin,
and bypass CS to AGND with a 0.1µF capacitor (C3), as
shown in Figure 11. To minimize leakage errors due to
finite trace-to-trace resistance, place both filter compo-
nents, as well as C5, as close to the CS pin as possible.
Minimizing SMBus Activity
Although proper layout minimizes coupling from the
digital data lines to the high-resolution analog interface,
the MAX1660’s analog interface may still detect switch-
ing noise in low-current, high-precision applications. In
such applications, it may be advantageous to use the
During normal operation, the external MOSFETs M1
and M2 conduct so that VSHDN is pulled up to VBATT. If
M1 is forced off, however, the voltage at SHDN falls
toward ground. To ensure that the signal at SHDN is a
logic high, one of the host’s GPIO lines is programmed
high at all times and is connected to SHDN through
diode D1. This diode protects the GPIO pin from volt-
ages at PACK+ that exceed the VL voltage. To com-
mand the MAX1660 to enter hard-shutdown mode, the
host simply turns MOSFET M1 off and drives the GPIO
line low, allowing the MAX1660’s SHDN to fall. Once in
hard-shutdown mode, the MAX1660 cannot wake up
until a valid supply voltage is applied to PACK+ (i.e.,
when the battery is connected to a charger), pulling
SHDN high through R11.
Layout Considerations
Use care during board layout to obtain the MAX1660’s
full precision over a wide range of input currents.
Proper board layout minimizes the noise coupled to the
analog sections from both high-current traces and digi-
tal switching. Use a star ground configuration and route
the SCL and SDA lines away from CS and AGND.
Lowpass filter the Coulomb-counter input by placing a
100Ω resistor between RCS and CS, and bypass CS to
AGND with a 0.1µF ceramic capacitor. To reduce leak-
age errors due to finite trace-to-trace resistance, place
both filter components as close to the IC as possible.
Use a Kelvin connection to obtain accurate measure-
ments when large currents are flowing (Figure 11).
Bypass REF to AGND with a 10nF ceramic capacitor
placed as close to the IC as possible. Bypass VL to
GND with a 0.33µF capacitor, also placed as close to
the IC as possible. Refer to the MAX1660 evaluation kit
layout for an example of proper board layout.
*Patent pending
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