MAX16125 Datasheet, PDF (8/16 Pages) Maxim Integrated Products – Dual Pushbutton Controllers

MAX16122–MAX16125
Dual Pushbutton Controllers in
Tiny 6-Bump WLP Package
All reset outputs are either active-low open-drain or
active-low push-pull (see the Selector Guide). RESET
changes from high to low whenever the monitored volt-
age V_CC drops below the reset threshold voltage. Once
V_CC exceeds its respective reset threshold voltage,
RESET remains low for the reset timeout period (tRP)
and then goes high. RESET is one-shot pulsed whenever
selected manual reset inputs are asserted longer than
the setup delay (tSU). RESET stays asserted for the nor-
mal reset timeout period.
RESET is guaranteed to be in the proper output logic
state for V_CC R 0.95V. For applications requiring valid
reset logic when V_CC is less than 0.95V, see the Ensuring
a Valid RESET Output Down to V_CC = 0V (Push-Pull
RESET Output) section.
Manual Reset Input
Each device in the MAX16122–MAX16125 family includes
at least one manual reset input, which must be held logic-
low for an extended setup period (t­_SU) before the RESET
output asserts. An internal pullup resistor is connected to
each manual reset input. When valid manual reset input
conditions/setup periods are met, the RESET output is
pulsed low for the reset timeout period (see Table 2).
Existing front-panel pushbutton switches (i.e., power-
on/-off, channel up/down, or mode select) can be used
to drive the manual reset inputs. The extended manual
reset setup period prevents nuisance system resets dur-
ing normal front-panel usage or resulting from inadver-
tent short-term pushbutton closure.
The MAX16124/MAX16125 include a single manual reset
input (MR) and two reset outputs (RESET and SRESET).
The MAX16122/MAX16123 include two manual reset
inputs (MR1 and MR2) and one reset output, RESET.
For dual MR1 and MR2 devices, both inputs must be
simultaneously pulled low and held for the extended
setup period (t_SU) before the reset output is pulsed. The
dual extended setup provides greater protection from
nuisance resets.
The MAX16122–MAX16125 RESET output is asserted
once for the reset timeout period after each valid manual
reset input condition. At least one manual reset input
must be released (go high) and then be driven low for
the extended setup period before RESET asserts again.
Internal timing circuitry debounces low-to-high manual
reset logic transitions, so no external circuitry is required.
tDB
MR
(MR1 AND MR2)
GND
RESET
GND
*SRESET
GND
tMRD
*SRESET IS FOR MAX16124/MAX16125
( ) MR1 AND MR2 IS FOR MAX16122/MAX16123
Figure 1a. Reset Timing Diagram
tSU
tRP
ONE-SHOT PULSE ON RESET
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