MAX15090_13 Datasheet, PDF(8/15 Page) Maxim Integrated Products – 2.7V to 18V, 12A, Hot-Swap Solution with Current Report Output

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MAX15090_13 Datasheet, PDF (8/15 Pages) Maxim Integrated Products – 2.7V to 18V, 12A, Hot-Swap Solution with Current Report Output

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MAX15090/MAX15090A

2.7V to 18V, 12A, Hot-Swap Solution

with Current Report Output

Bump Description (continued)

BUMP

NAME

GATE

CDLY

B2, C1, C2 GND

FAULT

REG

FUNCTION

GATE of Internal MOSFET. During startup, a 5.7FA current is sourced to enhance the internal MOSFET

with a 10V/ms slew rate. Connect an external capacitance from GATE to GND to reduce the output slew

rate during startup.

Enable Timer Input. Connect a capacitor between CDLY and GND to set a 1s/FF duration timeout

delay. The EN input has to be pulled low before the timeout delay elapses, to prevent internal MOSFET

shutdown after power-up.

Current-Limit Threshold Set. Connect a resistor from CB to GND to set the circuit-breaker threshold. Maximum

value of 40.2kÏ can be accepted for safe operation. Having the CB pin connected to GND sets the circuit-

breaker threshold at 0A.

Ground

Enable Input. Externally pulled up to logic-high state through a resistor normally connected to REG. The

EN input must be pulled down (for at least 1ms) by the external circuit before a programmable timeout

delay has elapsed, otherwise a shutdown occurs. The timeout timer starts counting when the internal

MOSFET is turned on. Connect a capacitor between CDLY and GND to program the duration of the

timeout delay. Connect EN to GND to disable this feature.

Fault Status Output. FAULT is an open-drain, active-low output. FAULT asserts low when an overcurrent

or overtemperature condition triggers a shutdown. FAULT is disabled during startup.

Internal Regulator Output. Bypass to ground with a 1FF capacitor. Do not power external circuitry using

the REG output (except a resistor > 50kÏ connected from REG to EN).

Active-High Enable Comparator Input. Pulling UV high enables the internal MOSFET to turn on. UV also

sets the undervoltage threshold. See the Setting the Undervoltage Threshold section.

Overvoltage Enable Input. Pull OV high to turn off the internal MOSFET. Connect OV to an external

resistive divider to set the overvoltage-disable threshold. See the Setting the Overvoltage Threshold

section.

Power-Good Output. PG is an open-drain, active-high output. PG pulls low until the internal power

MOSFET is fully enhanced.

Detailed Description

Enable Logic and Undervoltage/

Overvoltage-Lockout Threshold

The MAX15090/MAX15090A ICs enable the output, as

shown in Table 1. The devices are ready to drive the out-

put when the VCC supply rises above the VUVLO thresh-

old. The devices turn on the output when VCC > VUVLO,

VUV is high (VUV > 1.23V) and VOV is low (VOV < 1.23V).

The devices turn off the output when VUV falls below

(1.23V - VUV_HYS) or VOV rises above 1.23V. An external

resistive divider from IN to UV, OV, and ground provide

the flexibility to set the undervoltage/overvoltage-lockout

threshold to any desired level between VUVLO and 18V.

See Figure 1 and the Setting the Undervoltage Threshold

and Setting the Overvoltage Threshold sections.

Maxim Integrated

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