MAX1177 Datasheet, PDF (8/13 Pages) Maxim Integrated Products – 16-Bit, 135ksps, Single-Supply ADC with 0 to 10V Input Range

16-Bit, 135ksps, Single-Supply ADC
with to 10V Input Range
Power-Down Modes
Select standby mode or shutdown mode with the R/C
bit during the second falling edge of CS (see the
Selecting Standby or Shutdown Mode section). The
MAX1177 automatically enters either standby mode
(reference and buffer on) or shutdown (reference and
buffer off) after each conversion, depending on the sta-
tus of R/C during the second falling edge of CS.
Internal Clock
The MAX1177 generates an internal conversion clock to
free the µP from the burden of running the SAR conver-
sion clock. Total conversion time (t_CONV) after entering
hold mode (second falling edge of CS) to end-of-con-
version (EOC) falling is 4.7µs (max).
Applications Information
Starting a Conversion
CS and R/C control acquisition and conversion in the
MAX1177 (Figure 2). The first falling edge of CS powers
up the device and puts it in acquire mode if R/C is low.
The convert start is ignored if R/C is high. The device
needs at least 12ms for the internal reference to wake
up and settle before starting the conversion (C_REFADJ
= 0.1µF, C_REF = 10µF), if powering up from shutdown.
Selecting Standby or Shutdown Mode
The MAX1177 has a selectable standby or low-power
shutdown mode. In standby mode, the ADC’s internal
reference and reference buffer do not power down
between conversions, eliminating the need to wait for
the reference to power up before performing the next
conversion. Shutdown mode powers down the refer-
ence and reference buffer after completing a conver-
sion. The reference and reference buffer require a
minimum of 12ms to power up and settle from shut-
down (C_REFADJ = 0.1µF, C_REF = 10µF).
The state of R/C at the second falling edge of CS
selects which power-down mode the MAX1177 enters
upon conversion completion. Holding R/C low causes
the device to enter standby mode. The reference and
buffer are left on after the conversion completes. R/C
high causes the MAX1177 to enter shutdown mode and
power-down the reference and buffer after conversion
(Figures 5 and 6). Set the voltage at R/C high during
the second falling edge of CS to realize the lowest cur-
rent operation.
+5V ANALOG +5V DIGITAL
0.1µF
0.1µF
AV_DD
ANALOG INPUT AIN
DV_DD
D0–D7
OR
D8–D15
µP DATA
BUS
HIGH
BYTE
LOW
BYTE
MAX1177
EOC
R/C
REF
CS
REFADJ
HBEN
AGND DGND
0.1µF 10µF
Figure 3. Typical Operating Circuit for the MAX1177
MAX1177
R2
3.92kΩ
AIN
161Ω
R3
17.79kΩ
R1
3.4kΩ
TRACK
S1
C_HOLD
30pF
HOLD
TRACK
S1, S2 = T/H SWITCH
R2 = 3.92kΩ
R3 = 17.79kΩ
T/H OUT
HOLD
S2
Figure 4. Equivalent Input Circuit
8 _______________________________________________________________________________________