MAX1177 Datasheet, PDF (7/13 Pages) Maxim Integrated Products – 16-Bit, 135ksps, Single-Supply ADC with 0 to 10V Input Range

16-Bit, 135ksps, Single-Supply ADC
with 0 to 10V Input Range
Detailed Description
Converter Operation
The MAX1177 uses a successive-approximation (SAR)
conversion technique with an inherent track-and-hold
(T/H) stage to convert an analog input into a 16-bit digital
output. Parallel outputs provide a high-speed interface to
microprocessors (µPs). The Functional Diagram shows a
simplified internal architecture of the MAX1177. Figure 3
shows a typical operating circuit for the MAX1177.
DV_DD
DO–D15
1mA
DO–D15
1mA
C_LOAD = 20pF
C_LOAD = 20pF
DGND
a) HIGH-Z TO V_OH,
V_OL TO V_OH, AND
V_OH TO HIGH-Z
DGND
b) HIGH-Z TO V_OL,
V_OH TO V_OL, AND
V_OL TO HIGH-Z
Figure 1. Load Circuits
Analog Input
Input Scaler
The MAX1177 has an input scaler, which allows conver-
sion of input voltages ranging from 0 to 10V, while oper-
ating from a single +5V analog supply. The input scaler
attenuates and shifts the analog input to match the input
range of the internal digital-to-analog converter (DAC).
Figure 4 shows the equivalent input circuit of the
MAX1177. This circuit limits the current going into AIN to
less than 2mA.
Track and Hold (T/H)
In track mode, the internal hold capacitor acquires the
analog signal (Figure 4). In hold mode, the T/H switches
open and the capacitive DAC samples the analog input.
During the acquisition, the analog input (AIN) charges
capacitor C_HOLD. The acquisition ends on the second
falling edge of CS. At this instant, the T/H switches
open. The retained charge on C_HOLD represents a sam-
ple of the input. In hold mode, the capacitive DAC
adjusts during the remainder of the conversion time to
restore node T/H OUT to zero within the limits of 16-bit
resolution. Force CS low to put valid data on the bus
after conversion is complete.
CS
R/C
EOC
HBEN
D7/D15–D0/D8
t_CSL
t_CSH
t_ACQ
REF POWER-
DOWN CONTROL
t_DH
t_DS
t_CONV
HIGH-Z
Figure 2. MAX1177 Timing Diagram
t_DV
t_EOC
t_DO
t_DO
t_DO1
HIGH/LOW
BYTE VALID
t_BR
HIGH/LOW
BYTE VALID
HIGH-Z
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