DS1670 Datasheet, PDF (8/16 Pages) Dallas Semiconductor – Portable System Controller

DS1670
switch by pulling the RST line low. After the internal 250ms timer has expired, the DS1670 will continue
to monitor the RST line. If the line is still low, the DS1670 will continue to monitor the line looking for a
rising edge. Upon detecting release, the DS1670 will force the RST line low and hold it low for 250ms.
The third microprocessor monitoring function provided by the DS1670 is a watchdog timer. The
watchdog timer function forces RST to the active state when the ST input is not stimulated within the
predetermined time period. The time period is set by the Time Delay (TD) bits in the Watchdog Register.
The time delay can be set to 250ms, 500ms, or 1000ms (see Figure 5). If TD0 and TD1 are both set to 0,
the watchdog timer is disabled. When enabled, the watchdog timer starts timing out from the set time
period as soon as RST is inactive. The default setting is for the watchdog timer to be enabled with
1000ms time delay. If a high-to-low transition occurs on the ST input pin prior to timeout, the watchdog
timer is reset and begins to time-out again. If the watchdog timer is allowed to timeout, then the RST
signal is driven to the active state for 250ms (typical). The ST input can be derived from microprocessor
address signals, data signals, and/or control signals. To guarantee that the watchdog timer does not
timeout, a high-to-low transition must occur at or less than the minimum period.
WATCHDOG TIMEOUT CONTROL Figure 5
WATCHDOG REGISTER
BIT 7 BIT 6 BIT 5
0
0
0
BIT 4 BIT 3 BIT 2
0
0
0
WATCHDOG TIMEOUT
TD1 TD0
WATCHDOG TIMEOUT
0
0 Watchdog disabled
0
1 250ms
1
0 500ms
1
1 1000ms
BIT 1
TD1
BIT 0
TD0
ANALOG-TO-DIGITAL CONVERTER
The DS1670 provides a 3-channel, 8-bit analog-to-digital converter. The ADC reference voltage (2.55V
typical) is derived from an on-chip band-gap circuit. Three multiplexed analog inputs are provided
through the AIN0, AIN1, and AIN2 pins. The ADC is monotonic (no missing codes) and uses a
successive approximation technique to convert the analog signal into a digital code. An A/D conversion is
the process of assigning a digital code to an analog input voltage. This code represents the input value as
a fraction of the full-scale voltage (FSV) range. Thus, the FSV range is then divided by the ADC into 256
codes (8 bits). The FSV range is bounded by an upper limit equal to the reference voltage and the lower
limit, which is ground. The DS1670 has a FSV of 2.55V (typical) that provides a resolution of 10mV. An
input voltage equal to the reference voltage converts to FFh while an input voltage equal to ground
converts to 00h. The relative linearity of the ADC is ±0.5 LSB.
The ADC selects from one of three different analog inputs (AIN0–AIN2). The input that is selected is
determined by the Analog Input Select (AIS) bits in the Control Register. Table 2 lists the specific analog
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