DS1086L Datasheet, PDF (8/16 Pages) Maxim Integrated Products – 3.3V Spread-Spectrum EconOscillator

3.3V Spread-Spectrum EconOscillator
Pin Description
PIN
NAME
FUNCTION
1
OUT Oscillator Output. The output frequency is determined by the OFFSET, DAC, and prescaler registers.
2
SPRD Dither Enable. When the pin is high, the dither is enabled. When the pin is low, the dither is disabled.
3
V_CC Power Supply
4
GND Ground
5
OE
Output Enable. When the pin is high, the output buffer is enabled. When the pin is low, the output is
disabled but the master oscillator is still on.
6
PDN
Power-Down. When the pin is high, the master oscillator is enabled. When the pin is low, the master
oscillator is disabled (power-down mode).
7
SDA
2-Wire Serial Data. This pin is for serial data transfer to and from the device. The pin is open drain and
can be wire-ORed with other open-drain or open-collector interfaces.
8
SCL
2-Wire Serial Clock. This pin is used to clock data into the device on rising edges and clock data out on
falling edges.
SPECTRUM COMPARISON
(12OkHz BW, SAMPLE DETECT)
0
-10
8%
0.5%
NO
2%
SPREAD
-20
-30
-40
-50
-60
-70
-80
-90
43
fo = 50MHz
DITHER RATE = fo/4096
45
47
49
51
53
FREQUENCY (MHz)
Figure 1. Clock Spectrum Dither Comparison
Processor-Controlled Mode
V_CC
DITHERED 260kHz TO
133MHz OUTPUT
V_CC ^OUT
SPRD
V_CC
GND
DS1086
DECOUPLING CAPACITORS
(0.1µF and 0.01µF)
4.7kΩ
SCL
SDA
V_CC
PDN
OE
4.7kΩ
2-WIRE
INTERFACE
MAXIMUM THERMAL VARIATION vs.
MASTER OSCILLATOR FREQUENCY
3%
2%
1%
0
-1%
-2%
-3%
-4%
-5%
33 36 39 42 45 48 51 54 57 60 63 66
MASTER FREQUENCY (MHz)
Figure 2. Temperature Variation Over Frequency
Stand-Alone Mode
DITHERED 130kHz TO
V_CC
µP
66.6MHz OUTPUT
XTL1/OSC1
V_CC ^OUT
SCL*
XTL2/OSC2 N.C.
SPRD _DS1086L SDA*
V_CC
PDN
GND
OE
DECOUPLING CAPACITORS
(0.1µF and 0.01µF)
*SDA AND SCL CAN BE CONNECTED DIRECTLY HIGH IF THE DS1086L NEVER NEEDS
TO BE PROGRAMMED IN-CIRCUIT, INCLUDING DURING PRODUCTION TESTING.
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