MAX16072 Datasheet, PDF (7/8 Pages) Maxim Integrated Products – μP Supervisory Circuits in 4-Bump (1mm x 1mm) Chip-Scale Package

µP Supervisory Circuits in
4-Bump (1mm x 1mm) Chip-Scale Package
Manual Reset Input (MR)
Many FP-based products require manual-reset capabil-
ity, allowing the operator, a test technician, or external
logic circuit to initiate a reset. A logic-low on MR asserts
reset. Reset remains asserted while MR is low, and for
the reset active timeout period (tRP) or delay (tON) after
MR returns high. This input has an internal 50kI pullup
resistor, so it can be left unconnected if it is not used.
MR can be driven with TTL or CMOS logic levels, or
with open-drain/collector outputs. For manual operation,
connect a normally open momentary switch from MR to
GND; external debouncing circuitry is not required. If MR
is driven from long cables or if the device is used in a
noisy environment, connect a 0.1FF capacitor from MR to
ground to provide additional noise immunity.
Applications Information
Interfacing to µP with
Bidirectional Reset Pins
Since RESET on the MAX16074 is open-drain, this
device interfaces easily with FPs that have bidirectional
reset pins. Connecting the FP supervisor’s RESET output
directly to the FP’s RESET pin with a single pullup resis-
tor allows either device to assert reset (Figure 2).
Negative-Going VCC Transients
The MAX16072/MAX16073/MAX16074 family of devic-
es is relatively immune to short-duration, negative-
going VCC transients (glitches). The Typical Operating
Characteristics show the Maximum Transient Duration
vs. Reset Threshold Overdrive graph, for which reset
pulses are not generated. The graph shows the maxi-
mum pulse width that a negative-going VCC transient
may typically have when issuing a reset signal. As the
amplitude of the transient increases, the maximum allow-
able pulse width decreases.
Table 1. Factory Trimmed Reset
Thresholds
THRESHOLD
SUFFIX
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
RESET TRIP THRESHOLD (V)
TA = +25NC
TA = -40NC to +85NC
TYP
MIN
MAX
1.58
1.54
1.61
1.63
1.60
1.66
1.67
1.62
1.71
1.80
1.76
1.85
1.90
1.85
1.95
2.00
1.95
2.05
2.10
2.05
2.15
2.20
2.145
2.25
2.32
2.262
2.375
2.40
2.34
2.46
2.50
2.437
2.562
2.63
2.564
2.69
2.70
2.633
2.768
2.80
2.63
2.87
2.93
2.857
3.0
3.00
2.925
3.075
3.08
3.003
3.15
Table 2. Reset Timeout Periods
RESET TIMEOUT PERIODS
SUFFIX
MIN
0
20
TYP
MAX
80
120
1
8
13
17
2
34
52
69
3
140
210
280
UNITS
Fs
ms
ms
ms
V_CC
V_CC
MAX16074
MR
RESET
GND
V_CC
µP
MOTOROLA
68HCXX
RESET
INPUT
GND
Figure 2. Interfacing to µP with Bidirectional Reset Pins
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