MAX1240 Datasheet, PDF (7/16 Pages) Maxim Integrated Products – +2.7V, Low-Power, 12-Bit Serial ADCs in 8-Pin SO

+2.7V, Low-Power,
12-Bit Serial ADCs in 8-Pin SO
____________________________Typical Operating Characteristics (continued)
(V_DD = 3.0V, REF = 2.5V, f_SCLK = 2.1MHz, C_L = 20pF, T_A = +25°C, unless otherwise noted.)
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
0
INTEGRAL NONLINEARITY
vs. CODE
1024
2048
3072
4096
CODE
20
0
-20
-40
-60
-80
-100
-120
-140
0
FFT PLOT
f_AIN = 10kHz, 2.5Vp-p
f_SAMPLE = 73ksps
18.75
FREQUENCY (kHz)
37.50
_______________________________________________________________________Pin Description
PIN
NAME
FUNCTION
1
V_DD
Positive Supply Voltage: 2.7V to 3.6V, (MAX1240); 2.7 to 5.25V (MAX1241)
2
AIN
Sampling Analog Input, 0V to V_REF range
Three-Level Shutdown Input. Pulling SHDN low shuts the MAX1240/MAX1241 down to 15µA (max)
3
SHDN
supply current. Both the MAX1240 and MAX1241 are fully operational with either SHDN high or float-
ing. For the MAX1240, pulling SHDN high enables the internal reference, and letting SHDN float dis-
ables the internal reference and allows for the use of an external reference.
Reference Voltage for Analog-to-Digital Conversion. Internal 2.5V reference output for MAX1240;
4
REF
bypass with 4.7µF capacitor. External reference voltage input for MAX1241, or for MAX1240 with the
internal reference disabled. Bypass REF with a minimum of 0.1µF when using an external reference.
5
GND Analog and Digital Ground
6
DOUT
Serial Data Output. Data changes state at SCLK’s falling edge. DOUT is high impedance when CS is
high.
7
CS
Active-Low Chip Select initiates conversions on the falling edge. When CS is high, DOUT is high
impedance.
8
SCLK Serial Clock Input. SCLK clocks data out at rates up to 2.1MHz.
_______________________________________________________________________________________ 7