MAX1156 Datasheet, PDF (7/15 Pages) Maxim Integrated Products – 14-Bit, 135ksps, Single-Supply ADCs with Bipolar Analog Input Range

14-Bit, 135ksps, Single-Supply ADCs with
Bipolar Analog Input Range
Pin Description (continued)
PIN
NAME
FUNCTION
High-Byte Enable Input. Used to multiplex the 14-bit conversion result.
13
HBEN 1: Most significant byte available on the data bus.
0: Least significant byte available on the data bus.
Convert Start. The first falling edge of CS powers up the device and enables acquire mode when R/C
14
CS
is low. The second falling edge of CS starts conversion. The third falling edge of CS loads the result
onto the bus when R/C is high.
15
DGND Digital Ground
16
DV_DD Digital Supply Voltage. Bypass with a 0.1µF capacitor to DGND.
17
D0/D8 Three-State Digital Data Output. D0 is the LSB.
18
D1/D9 Three-State Digital Data Output
19
D2/D10 Three-State Digital Data Output
20
D3/D11 Three-State Digital Data Output
DV_DD
DO–D13
1mA
DO–D13
1mA
C_LOAD = 20pF
C_LOAD = 20pF
DGND
a) HIGH-Z TO V_OH,
V_OL TO V_OH, AND
V_OH TO HIGH-Z
Figure 1. Load Circuits
DGND
b) HIGH-Z TO V_OL,
V_OH TO V_OL, AND
V_OL TO HIGH-Z
Detailed Description
Converter Operation
The MAX1156/MAX1158/MAX1174 use a successive-
approximation (SAR) conversion technique with an
inherent track-and-hold (T/H) stage to convert an ana-
log input into a 14-bit digital output. Parallel outputs
provide a high-speed interface to microprocessors
(µPs). The Functional Diagram shows a simplified inter-
nal architecture of the MAX1156/MAX1158/MAX1174.
Figure 3 shows a typical application circuit for the
MAX1156/MAX1158/MAX1174.
Analog Input
Input Scaler
The MAX1156/MAX1158/MAX1174 have an input
scaler, which allows conversion of true bipolar input
voltages and input voltages greater than the power
supply, while operating from a single +5V analog sup-
ply. The input scaler attenuates and shifts the analog
input to match the input range of the internal DAC. The
MAX1156 has a unipolar input voltage range of 0 to
+10V. The MAX1158 input voltage range is ±10V while
the MAX1174 input voltage range is ±5V. Figure 4
shows the equivalent input circuit of the MAX1156/
MAX1158/MAX1174. This circuit limits the current going
into or out of AIN to less than 1.8mA.
Track and Hold (T/H)
In track mode, the internal hold capacitor acquires the
analog signal (see Figure 4). In hold mode, the T/H
switches open and the capacitive DAC samples the
analog input. During the acquisition, the analog input
(AIN) charges capacitor C_HOLD. The acquisition ends
on the second falling edge of CS. At this instant, the
T/H switches open. The retained charge on C_HOLD rep-
resents a sample of the input. In hold mode, the capac-
itive DAC adjusts during the remainder of the
conversion time to restore node T/H OUT to zero within
the limits of 14-bit resolution. Force CS low to put valid
data on the bus after conversion is complete.
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