DS1375 Datasheet, PDF (7/13 Pages) Dallas Semiconductor – 2-Wire Digital Input RTC with Alarm

I²C Digital Input RTC with Alarm
Table 1. Timekeeping Registers and SRAM
ADDRESS
00h
01h
BIT 7
0
0
02h
0
03h
0
04h
0
05h
Century
06h
07h
A1M1
08h
A1M2
09h
A1M3
BIT 6
BIT 5
BIT 4
10 Seconds
12/24
0
0
10 Minutes
AM/PM
10 Hours
10 Hours
0
0
10 Date
0
0
10
Month
10 Year
10 Seconds
12/24
10 Minutes
AM/PM
10 Hours
10 Hours
BIT 3
0
0Ah
A1M4 DY/DT
10 Date
0Bh
A2M2
10 Minutes
AM/PM
0Ch
A2M3 12/24
10 Hours
10 Hours
0Dh
A2M4 DY/DT
—
10 Date
0Eh
ECLK CLKSEL1 CLKSEL0 RS2
RS1
BIT 2 BIT 1
Seconds
Minutes
Hours
Day
Date
Months
Year
Seconds
Minutes
Hours
Day
Date
Minutes
Hours
Day
Date
INTCN A2IE
BIT 0
A1IE
0Fh
0
0
0
0
0
0
A2F A1F
10h–1Fh
B7
B6
B5
B4
B3
B2
B1
B0
FUNCTION
Seconds
Minutes
Hours
Day
Date
Month/
Century
Year
Alarm 1 Seconds
Alarm 1 Minutes
Alarm 1 Hours
Alarm 1 Day
Alarm 1 Date
Alarm 2 Minutes
Alarm 2 Hours
Alarm 2 Day
Alarm 2 Date
Control
Control/
Status
SRAM
RANGE
00–59
00–59
1–12 + AM/PM
00–23
1–7
00–31
01–12 +
Century
00–99
00–59
00–59
1–12 + AM/PM
00–23
1–7
1–31
00–59
1–12 + AM/PM
00–23
1–7
1–31
—
—
00–FFH
month register) is toggled when the years register over-
flows from 99 to 00.
The day-of-week register increments at midnight.
Values that correspond to the day of week are user-
defined but must be sequential (i.e., if 1 equals
Sunday, then 2 equals Monday, and so on). Illogical
time and date entries result in undefined operation.
When reading or writing the time and date registers,
secondary (user) buffers are used to prevent errors
when the internal registers update. When reading the
time and date registers, the user buffers are synchro-
nized to the internal registers on any START or STOP
and when the register pointer rolls over to zero. The
time information is read from these secondary registers,
while the clock continues to run. This eliminates the
need to reread the registers in case the main registers
update during a read.
The countdown chain is reset whenever the seconds
register is written. Write transfers occur on the acknowl-
edge from the DS1375. Once the countdown chain is
reset, to avoid rollover issues the remaining time and
date registers must be written within 1 second. The 1Hz
square-wave output, if enabled, transitions high 500ms
after the seconds data transfer, provided the clock
input is already being driven.
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