DS1375 Datasheet, PDF (6/13 Pages) Dallas Semiconductor – 2-Wire Digital Input RTC with Alarm

I²C Digital Input RTC with Alarm
Pin Description
PIN
NAME
FUNCTION
1
CLK
Digital Clock Input. This pin must be 32,768Hz, 8192Hz, 60Hz, or 50Hz square wave, 45% to 55%
duty cycle.
2
SQW/INT
Square-Wave/Interrupt Output. This pin is open drain and requires an external pullup resistor. The
pullup voltage can be up to 5.5V, regardless of the voltage on V_CC.
3
GND
Ground
Serial Data Input/Output. SDA is the data input/output for the I²C serial interface. It is open drain
4
SDA
and requires an external pullup resistor. The pullup voltage can be up to 5.5V, regardless of the
voltage on V_CC.
Serial Clock Input. SCL is the clock input for the I²C serial interface, and is used to synchronize
5
SCL
data movement on the serial interface. Up to 5.5V can be used for this pin, regardless of the
voltage on V_CC.
6
V_CC
DC Power for Primary Power Supply
—
EP
Exposed Pad. Can be connected to ground.
Detailed Description
The DS1375 digital input RTC with alarm is a low-power
clock/calendar with two programmable time-of-day
alarms and a programmable square-wave output.
Address and data are transferred serially through the
I²C serial interface bus. The clock/calendar provides
seconds, minutes, hours, day, date, month, and year
information. The date at the end of the month is auto-
matically adjusted for months with fewer than 31 days,
including corrections for leap year. The clock operates
in either the 24-hour or 12-hour format with an AM/PM
indicator. The DS1375 requires an external clock
source selectable between 32,768Hz, 8192Hz, 60Hz,
or 50Hz for the timekeeping function. Sixteen bytes of
SRAM are provided for additional user storage.
When power is applied, the time and date registers are
reset to 01/01/00 01 00:00:00 (MM/DD/YY DOW
HH:MM:SS).
Operation
The DS1375 operates as a slave device on the serial
bus. Access is obtained by implementing a START
condition and providing a device identification code,
followed by data. Subsequent registers can be
accessed sequentially until a STOP condition is execut-
ed. The functional diagram in Figure 2 shows the main
elements of the serial RTC.
Address Map
Table 1 shows the address map for the timekeeping
registers and SRAM. The 16 bytes of SRAM occupy
addresses 10h–1Fh. During a multibyte access, when
the address pointer reaches the end of the register
space (1Fh), it wraps around to location 00h. On a
I²C START, STOP, or address pointer incrementing to
location 00h, the current time is transferred to a second
set of registers. The time information is read from these
secondary registers, while the clock may continue to
run. This eliminates the need to reread the registers in
case the main registers update during a read.
Note: Unless otherwise specified, the state of the regis-
ters is not defined when power is first applied.
Clock and Calendar
The time and calendar information is obtained by read-
ing the appropriate register bytes. Table 1 shows the
RTC registers. The time and calendar data are set or
initialized by writing the appropriate register bytes. The
contents of the time and calendar registers are in the
binary-coded decimal (BCD) format. The DS1375 can
be run in either 12-hour or 24-hour mode. Bit 6 of the
hours register is defined as the 12- or 24-hour mode
select bit. When high, the 12-hour mode is selected. In
the 12-hour mode, bit 5 is the AM/PM bit with logic high
being PM. In the 24-hour mode, bit 5 is the second 10-
hour bit (20–23 hours). The century bit (bit 7 of the
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