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DG417CJ Datasheet, PDF (7/12 Pages) Maxim Integrated Products – Improved, SPST/SPDT Analog Switches
Improved, SPST/SPDT Analog Switches
_____________________________________________________Test Circuits/Timing Diagrams
+3V
LOGIC
INPUT 0V
50%
tR < 20ns
tF < 20ns
SWITCH 0V
OUTPUT
tOFF
VOUT
0.9 x VOUT
tON
0.9 x VOUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
Figure 2. DG417/DG418 Switching Time
+5V
SWITCH
INPUT
VL
D
IN
+15V
V+
S
DG417
DG418
SWITCH
OUTPUT
VOUT
RL
300Ω
CL
35pF
LOGIC
INPUT
GND
V-
-15V
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
( ) VOUT = VD
RL
RL + RDS(ON)
+3V
LOGIC
INPUT 0V
SWITCH VOUT1
OUTPUT
tR < 20ns
50%
tF < 20ns
tTRANS
VOUT2
tTRANS
0.8 x VOUT1
0.8 x VOUT2
Figure 3. DG419 Transition Time
LOGIC
INPUT
+15V
S1 V+
S2
IN
GND
+5V
VL
D
DG419
VOUT
RL
CL
1000Ω
35pF
V-
-15V
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
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