MAX152 Datasheet, PDF (6/12 Pages) Maxim Integrated Products – +3V, 8-Bit ADC with 1uA Power-Down

+3V, 8-Bit ADC with 1µA Power-Down
DATA
OUTPUTS
3k
DATA
OUTPUTS
CL
VDD
3k
CL
DATA
OUTPUTS
3k
DATA
OUTPUTS
10pF
VDD
3k
10pF
A. HIGH-Z TO VOH
B. HIGH-Z TO VOL
Figure 1. Load Circuits for Data-Access Time Test
____________________Pin Description
PIN
1
2
3-5
6
7
8
9
10
11
12
13
14-16
17
18
19
20
NAME
FUNCTION
V_IN
Analog Input. Range is
VREF- ≤ V_IN ≤ VREF+.
D0
Three-State Data Output (LSB)
D1-D3 Three-State Data Outputs
WR/RDY
Write Control Input/Ready Status
Output*
MODE
Mode Selection Input is internally
pulled low with a 15µA current source.
MODE = 0 activates read mode
MODE = 1 activates write-read mode*
RD
Read Input must be low to access
data.*
INT
Interrupt Output goes low to indicate
end of conversion.*
GND Ground
VREF-
VREF+
CS
Lower limit of reference span. Sets the
zero-code voltage. Range is
V_SS ≤ VREF- < VREF+.
Upper limit to reference span. Sets the
full-scale input voltage. Range is
VREF- < VREF+ ≤ V_DD.
Chip-Select Input must be low for the
device recognize WR or RD inputs.
D4-D6 Three-State Data Outputs
D7
Three-State Data Output (MSB)
PWRDN
V_SS
V_DD
Powerdown Input reduces supply
current when low.
Negative Supply. Unipolar: VSS = 0V,
Bipolar: V_SS = -3V.
Positive Supply, +3V.
*See Digital Inferface Section.
A. VOH TO HIGH-Z
B. VOL TO HIGH-Z
Figure 2. Load Circuits for Data-Hold TIme Test
_______________Detailed Description
Converter Operation
The MAX152 uses a half-flash conversion technique
(see Functional Diagram) in which two 4-bit flash ADC
sections achieve an 8-bit result. Using 15 compara-
tors, the flash ADC compares the unknown input volt-
age to the reference ladder and provides the upper 4
data bits.
An internal digital-to-analog converter (DAC) uses the
4 most significant bits (MSBs) to generate the analog
result from the first flash conversion and a residue volt-
age that is the difference between the unknown input
and the DAC voltage. The residue is then compared
again with the flash comparators to obtain the lower 4
data bits (LSBs).
The MAX152 is characterized for operation between
+3.0V and +3.6V. Conversion times decrease as the
supply voltage increases. The supply current decreas-
es rapidly with decreasing supply voltage. (See
Typical Operating Characteristics.)
Power-Down Mode
In burst-mode or low sample-rate applications, the
MAX152 can be shut down between conversions,
reducing supply current to microamp levels (see
Typical Operating Characteristics). A logic low on the
PWRDN pin shuts the device down, reducing supply
current to typically 1µA when powered from a single 3V
supply. A logic high on PWRDN wakes up the
MAX152. A new conversion can be started within
900ns of the PWRDN pin being driven high (this
includes both the power-up delay and the track/hold
acquisition time). If power-down mode is not required,
connect PWRDN to V_DD.
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