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DG202_06 Datasheet, PDF (6/12 Pages) Maxim Integrated Products – Quad SPST CMOS Analog Switches
Quad SPST CMOS Analog Switches
LOGIC
INPUT
3V
tr < 20ns
tf < 20ns 0
SWITCH
INPUT VS
SWITCH 0
OUTPUT
LOGIC 1 SW ON
50%
VO 0.9
tOFF
SWITCH
INPUT
VS = +2V S1
VO 0.9
LOGIC
INPUT IN1
VO
0.1
tOFF1
tOFF2
GND
0V
+15V
V+
D1
VO = VS
RL
RL + rDS(ON)
SWITCH
OUTPUT
VO
RL
CL
1kΩ 35pF
V- (REPEAT TEST FOR IN2, IN3, AND IN4)
-15V
Figure 1. Switching Time
Typical RDS(ON) vs. Power Supplies for Maxim’s DG202, and DG212
POWER SUPPLIES
±5V
±10V
±15V
-5V
350Ω
—
—
+5V
380Ω
—
—
RDS(ON) AT ANALOG SIGNAL LEVEL
-10V
+10V
—
—
165Ω
250Ω
125Ω
160Ω
-15V
—
—
135Ω
+15V
—
—
155Ω
this current is required to be kept to low (µA) levels
then the addition of external protection diodes is rec-
ommended.
To provide protection for overvoltages up to 20V above
the supplies, a 1N4001 or 1N914 type diode should be
placed in series with the positive and negative supplies
as shown in Figure 2. The addition of these diodes will
reduce the analog signal range to 1V below the posi-
tive supply and 1V above the negative supply.
Pin Configurations (continued)
1
16
2
15
IN4001
3
14
IN4001
-15V
4
DG202
13
+15V
DG212
5
12
6
11
7
10
8
9
TOP VIEW
D1 IN1 IN2 D2
16 15 14 13
Figure 2. Protection against Fault Conditions
S1 1
12 S2
V- 2
GND 3
S4 4
DG202
DG212
*EP
11 V+
10 N.C.
9 S3
5
6
7
8
D4 IN4 IN3 D3
TQFN*
*EXPOSED PAD. CONNECT EXPOSED PAD TO V+
OR LEAVE EXPOSED PAD UNCONNECTED.
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