MAX11046B Datasheet, PDF (5/10 Pages) Maxim Integrated Products – 8-Channel Simultaneous- Sampling Analog Front End

Table 1. Power Requirement for the Petaluma Subsystem Reference Design
Power Type
Jumper Shunt Input Voltage (V) Input Current (mA, typ)
3.3
6.2
On-board power JU1–JU4: 1–2
12
70
3.3
6.2
5
41.4
External power
JU1–JU4: 2–3
10
9.4
-10
9.4
Table 2. Supported Platforms and Ports
Supported Platforms
Ports
ZedBoard platform (Zynq^®-7020)
J1
Detailed Description of ZedBoard Firmware
Table 2 shows the currently supported platforms and ports. Support for additional platforms may be added periodically under
Firmware Files in the All Design Files section.
The Petaluma firmware released for the ZedBoard kit targets an ARM^® Cortex^®-A9 processor placed inside a Xilinx Zynq system-
on-chip (SoC).
The firmware is a working example of how to interface to the hardware, collect samples, and save them to memory. Figure 3
shows the process flow. The firmware is written in C using the Xilinx SDK tool, which is based on the Eclipse open source
standard. Custom Petaluma-specific design functions were created utilizing the AXI MAX11046 custom IP core. The firmware
supports the maximum ADC sampling rate at 250ksps.
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