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DS87C520-QNL Datasheet, PDF (5/43 Pages) Maxim Integrated Products – EPROM/ROM High-Speed Microcontrollers
DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers
PIN DESCRIPTION (continued)
PIN
DIP
PLCC
TQFP
NAME
30
33
27
ALE
39
43
38
42
37
41
36
40
35
39
34
38
33
37
32
36
1
2
2
3
3
4
4
5
5
6
37
P0.0 (AD0)
36
P0.1 (AD1)
35
P0.2 (AD2)
34
P0.3 (AD3)
33
P0.4 (AD4)
32
P0.5 (AD5)
31
P0.6 (AD6)
30
P0.7 (AD7)
40
P1.0
41
P1.1
42
P1.2
43
P1.3
44
P1.4
FUNCTION
Address Latch Enable Output. The ALE functions as a clock to
latch the external address LSB from the multiplexed address/data bus
on Port 0. This signal is commonly connected to the latch enable of an
external 373 family transparent latch. ALE has a pulse width of 1.5
XTAL1 cycles and a period of four XTAL1 cycles. ALE is forced
high when the DS87C520/DS83C520 are in a reset condition. ALE
can also be disabled and forced high by writing ALEOFF = 1
(PMR.2). ALE operates independently of ALEOFF during external
memory accesses.
Port 0 (AD0–7), I/O. Port 0 is an open-drain, 8-bit, bidirectional I/O
port. As an alternate function Port 0 can function as the multiplexed
address/data bus to access off-chip memory. During the time when
ALE is high, the LSB of a memory address is presented. When ALE
falls to a logic 0, the port transitions to a bidirectional data bus. This
bus is used to read external ROM and read/write external RAM
memory or peripherals. When used as a memory bus, the port
provides active high drivers. The reset condition of Port 0 is tri-state.
Pullup resistors are required when using Port 0 as an I/O port.
Port 1, I/O. Port 1 functions as both an 8-bit, bidirectional I/O port
and an alternate functional interface for Timer 2 I/O, new External
Interrupts, and new Serial Port 1. The reset condition of Port 1 is with
all bits at a logic 1. In this state, a weak pullup holds the port high.
This condition also serves as an input state; a weak pullup holds the
port high. This condition also serves as an input mode, since any
external circuit that writes to the port will overcome the weak pullup.
When software writes a 0 to any port pin, the DS87C520/DS83C520
will activate a strong pulldown that remains on until either a 1 is
written or a reset occurs. Writing a 1 after the port has been at 0 will
cause a strong transition driver to turn on, followed by a weaker
sustaining pullup. Once the momentary strong driver turns off, the
port again becomes the output high (and input) state. The alternate
modes of Port 1 are out-lines as follows.
6
7
7
8
8
9
Port Alternate
Function
1
P1.5
P1.0 T2
External I/O for Timer/Counter 2
P1.1 T2EX
EX Timer/Counter 2 Capture/Reload Trigger
P1.2 RXD1
Serial Port 1 Input
2
P1.6
P1.3 TXD1
Serial Port 1 Output
P1.4 INT2
External Interrupt 2 (Positive Edge Detect)
P1.5 INT3
External Interrupt 3 (Negative Edge Detect)
3
P1.7
P1.6 INT4
External Interrupt 4 (Positive Edge Detect)
P1.7 INT5
External Interrupt 5 (Negative Edge Detect)
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