English
Language : 

DS87C520-QNL Datasheet, PDF (33/43 Pages) Maxim Integrated Products – EPROM/ROM High-Speed Microcontrollers
◁
DS87C520/DS83C520 EPROM/ROM High-Speed Microcontrollers
MOVX CHARACTERISTICS
PARAMETER
SYMBOL
Data Access ALE Pulse Width
tLHLL2
Port 0 Address Valid to ALE Low
Address Hold after ALE Low for
MOVX Write
RD Pulse Width
tAVLL2
tLLAX2
tRLRH
WR Pulse Width
tWLWH
RD Low to Valid Data In
Data Hold After Read
Data Float after Read
tRLDV
tRHDX
tRHDZ
ALE Low to Valid Data In
tLLDV
Port 0 Address to Valid Data In
tAVDV1
Port 2 Address to Valid Data In
tAVDV2
ALE Low to RD or WR Low
Port 0 Address to RD or WR Low
Port 2 Address to RD or WR Low
Data Valid to WR Transition
Data Hold after Write
RD Low to Address Float
RD or WR High to ALE High
tLLWL
tAVWL1
tAVWL2
tQVWX
tWHQX
tRLAZ
tWHLH
VARIABLE CLOCK
MIN
MAX
1.5tCLCL-5
2tCLCL-5
0.5tCLCL-5
tCLCL-5
0.5tCLCL-10
tCLCL-7
2tCLCL-5
tMCS-10
2tCLCL-5
tMCS-10
0
2tCLCL-22
tMCS-24
tCLCL-5
2tCLCL-5
2.5tCLCL-31
tMCS+tCLCL-26
3tCLCL-29
tMCS+2tCLCL-
29
0.5tCLCL-10
tCLCL-5
tCLCL-9
2tCLCL-7
1.5tCLCL-17
2.5tCLCL-16
-6
tCLCL-5
2tCLCL-6
-4
tCLCL-5
3.5tCLCL-37
tMCS+2.5tCLCL-
37
0.5tCLCL+5
tCLCL+5
(Note 2)
10
tCLCL+5
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
STRETCH
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
—
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
tMCS=0
tMCS>0
—
tMCS=0
tMCS>0
—
tMCS=0
tMCS>0
Note 1:
Note 2:
tMCS is a time period related to the Stretch memory cycle selection. The following table shows the value of tMCS for
each Stretch selection.
Address is driven strongly until ALE falls, and is then held in a weak latch until overdriven externally.
33 of 43
 ▷