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| MAX14840E_15 Datasheet, PDF (4/16 Pages) Maxim Integrated Products – 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers | |||
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
Switching Characteristics (continued)
(VCC = +3.0V to +3.6V, TA = -40NC to +125NC, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25NC.) (Notes 3, 4)
Driver Differential Output Rise or
Fall Time
tHL, tLH
RL = 54I, CL = 50pF, Figures 2 and 3
(Notes 6, 9)
7.5
ns
PARAMETER
Maximum Data Rate
Driver Enable to Output High
SYMBOL
DRMAX
tDZH
CONDITIONS
RL = 110I, CL = 50pF, Figures 4 and 5
(Notes 6, 7)
MIN TYP MAX UNITS
40
Mbps
30
ns
Driver Enable to Output Low
tDZL
RL = 110I, CL = 50pF, Figures 4 and 5
(Notes 6, 7)
30
ns
Driver Disable Time from Low
tDLZ
RL = 110I, CL = 50pF, Figures 4 and 5
(Notes 6, 7)
30
ns
Driver Disable Time from High
tDHZ
RL = 110I, CL = 50pF, Figures 4 and 5
(Notes 5, 6)
30
ns
Driver Enable from Shutdown to
Output Low
tDZL(SHDN)
RL = 110I, CL = 50pF, Figures 4 and 5
(Notes 6, 7)
4
Fs
Driver Enable from Shutdown to
Output High
tDZH(SHDN)
RL = 110I, CL = 50pF, Figures 4 and 5
(Notes 6, 7)
4
Fs
Time to Shutdown
tSHDN (Note 8)
50
RECEIVER
Propagation Delay
Receiver Output Skew
Maximum Data Rate
tRPLH
tRPHL
CL = 15pF, Figures 6 and 7 (Note 6)
tRSKEW CL = 15pF, Figures 6 and 7 (Notes 6, 9)
DRMAX
40
Receiver Enable to Output High
Receiver Enable to Output Low
tRZH
tRZL
RL = 1kI, CL = 15pF, Figure 8 (Notes 6, 7)
RL = 1kI, CL = 15pF, Figure 8 (Notes 6, 7)
Receiver Disable Time from Low
Receiver Disable Time from High
tRLZ
tRHZ
RL = 1kI, CL = 15pF, Figure 8 (Notes 6, 7)
RL = 1kI, CL = 15pF, Figure 8 (Notes 6, 7)
Receiver Enable from Shutdown
to Output Low
tRZL(SHDN) RL = 1kI, CL = 15pF, Figure 8 (Notes 6, 7)
800
ns
25
ns
25
2
ns
Mbps
20
ns
20
ns
20
ns
20
ns
4
Fs
Receiver Enable from Shutdown
to Output High
tRZH(SHDN) RL = 1kI, CL = 15pF, Figure 8 (Notes 6, 7)
4
Fs
Time to Shutdown
tSHDN (Note 8)
50
800
ns
Note 3: All devices are 100% production tested at TA = +25NC. Specifications for all temperature limits are guaranteed by design.
Note 4: All currents into the device are positive; all currents out of the device are negative. All voltages are referenced to device
ground, unless otherwise noted.
Note 5: DVOÂ D and DVOC are the changes in VOD and VOC, respectively, when the DI input changes state.
Note 6: Capacitive load includes test probe and fixture capacitance.
Note 7: The timing parameter refers to the driver or receiver enable delay when the device has exited the initial hot-swap protect
state and is in normal operating mode.
Note 8: Shutdown is enabled by driving RE high and DE low. The device is guaranteed to have entered shutdown after tSHDN has
elapsed.
Note 9: Parameter is guaranteed by characterization and not production tested.
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